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- Used the time stamp counter from a pentium if it is available
(in KeStallExecutionProcessor/KeQueryPerformanceCounter). svn path=/trunk/; revision=11655
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b39c7349f9
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2 changed files with 84 additions and 20 deletions
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@ -5,6 +5,8 @@
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#ifndef __INTERNAL_HAL_HAL_H
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#define __INTERNAL_HAL_HAL_H
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#define HAL_APC_REQUEST 0
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#define HAL_DPC_REQUEST 1
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/* display.c */
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VOID FASTCALL HalInitializeDisplay (PLOADER_PARAMETER_BLOCK LoaderBlock);
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@ -86,6 +88,20 @@ HalQueryDisplayOwnership();
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#define Ki386DisableInterrupts() __asm__ __volatile__("cli\n\t")
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#define Ki386EnableInterrupts() __asm__ __volatile__("sti\n\t")
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#define Ki386HaltProcessor() __asm__ __volatile__("hlt\n\t")
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#define Ki386RdTSC(x) __asm__ __volatile__("rdtsc\n\t" : "=A" (x.u.LowPart), "=d" (x.u.HighPart));
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static inline BYTE Ki386ReadFsByte(ULONG offset)
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{
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BYTE b;
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__asm__ __volatile__("movb %%fs:(%1),%0":"=g" (b):"0" (offset));
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return b;
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}
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static inline VOID Ki386WriteFsByte(ULONG offset, BYTE value)
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{
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__asm__ __volatile__("movb %0,%%fs:(%1)"::"r" (value), "r" (offset));
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}
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#elif defined(_MSC_VER)
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#define Ki386SaveFlags(x) __asm pushfd __asm pop x;
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#define Ki386RestoreFlags(x) __asm push x __asm popfd;
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@ -20,7 +20,7 @@
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* MA 02139, USA.
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*
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*/
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/* $Id: timer.c,v 1.6 2004/08/02 15:09:22 navaraf Exp $
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/* $Id: timer.c,v 1.7 2004/11/14 19:01:31 hbirr Exp $
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*
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* PROJECT: ReactOS kernel
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* FILE: ntoskrnl/hal/x86/udelay.c
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@ -32,7 +32,9 @@
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/* INCLUDES ***************************************************************/
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#include <roscfg.h>
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#include <ddk/ntddk.h>
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#include <internal/ps.h>
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#include <hal.h>
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#define NDEBUG
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@ -127,7 +129,23 @@ ROSL1:
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VOID STDCALL KeStallExecutionProcessor(ULONG Microseconds)
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{
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__KeStallExecutionProcessor((delay_count*Microseconds)/1000);
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PKPCR Pcr = KeGetCurrentKPCR();
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if (Pcr->PrcbData.FeatureBits & X86_FEATURE_TSC)
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{
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LARGE_INTEGER EndCount, CurrentCount;
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Ki386RdTSC(EndCount);
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EndCount.QuadPart += Microseconds * (ULONGLONG)Pcr->PrcbData.MHz;
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do
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{
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Ki386RdTSC(CurrentCount);
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}
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while (CurrentCount.QuadPart < EndCount.QuadPart);
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}
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else
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{
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__KeStallExecutionProcessor((Pcr->StallScaleFactor*Microseconds)/1000);
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}
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}
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static ULONG Read8254Timer(VOID)
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@ -178,6 +196,8 @@ VOID HalpCalibrateStallExecution(VOID)
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ULONG i;
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ULONG calib_bit;
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ULONG CurCount;
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PKPCR Pcr;
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LARGE_INTEGER StartCount, EndCount;
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if (UdelayCalibrated)
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{
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@ -185,14 +205,30 @@ VOID HalpCalibrateStallExecution(VOID)
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}
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UdelayCalibrated = TRUE;
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DbgPrint("Calibrating delay loop... [");
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Pcr = KeGetCurrentKPCR();
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/* Initialise timer interrupt with MILLISEC ms interval */
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WRITE_PORT_UCHAR((PUCHAR) TMR_CTRL, TMR_SC0 | TMR_BOTH | TMR_MD2); /* binary, mode 2, LSB/MSB, ch 0 */
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WRITE_PORT_UCHAR((PUCHAR) TMR_CNT0, LATCH & 0xff); /* LSB */
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WRITE_PORT_UCHAR((PUCHAR) TMR_CNT0, LATCH >> 8); /* MSB */
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if (Pcr->PrcbData.FeatureBits & X86_FEATURE_TSC)
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{
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WaitFor8254Wraparound();
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Ki386RdTSC(StartCount);
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WaitFor8254Wraparound();
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Ki386RdTSC(EndCount);
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Pcr->PrcbData.MHz = (ULONG)(EndCount.QuadPart - StartCount.QuadPart) / 10000;
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DPRINT("%dMHz\n", Pcr->PrcbData.MHz);
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return;
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}
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DbgPrint("Calibrating delay loop... [");
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/* Stage 1: Coarse calibration */
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WaitFor8254Wraparound();
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@ -284,10 +320,22 @@ KeQueryPerformanceCounter(PLARGE_INTEGER PerformanceFreq)
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* performance counter ticks per second here
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* RETURNS: The number of performance counter ticks since boot
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*/
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{
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PKPCR Pcr = KeGetCurrentKPCR();
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LARGE_INTEGER Value;
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if (Pcr->PrcbData.FeatureBits & X86_FEATURE_TSC)
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{
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if (NULL != PerformanceFreq)
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{
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PerformanceFreq->QuadPart = Pcr->PrcbData.MHz * (ULONGLONG)1000000;
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}
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Ki386RdTSC(Value);
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}
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else
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{
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LARGE_INTEGER TicksOld;
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LARGE_INTEGER TicksNew;
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LARGE_INTEGER Value;
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ULONG CountsLeft;
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if (NULL != PerformanceFreq)
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@ -303,7 +351,7 @@ KeQueryPerformanceCounter(PLARGE_INTEGER PerformanceFreq)
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KeQueryTickCount(&TicksNew);
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}
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while (TicksOld.QuadPart != TicksNew.QuadPart);
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}
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return Value;
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}
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