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NMI Support Patch 1:
[HAL]: The I/O Permissions Map on a typical Privileged Mode x86 OS is all 0xFF's, so it's quite wasteful to copy-in/out the entire map each single BIOS Call. As an optimization, only save and restore non-0xFF entries. [NTOS]: Define and use constants for different IOPM values, instead of using hardcoded values. svn path=/trunk/; revision=44841
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@ -1,9 +1,9 @@
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/*
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/*
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* PROJECT: ReactOS HAL
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* PROJECT: ReactOS Hardware Abstraction Layer (HAL)
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* LICENSE: GPL - See COPYING in the top level directory
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* LICENSE: BSD - See COPYING.ARM in the top level directory
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* FILE: hal/halx86/generic/bios.c
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* FILE: halx86/generic/bios.c
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* PURPOSE: BIOS Access Routines
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* PURPOSE: BIOS Access Routines
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* PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org)
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* PROGRAMMERS: ReactOS Portable Systems Group
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*/
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*/
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/* INCLUDES *******************************************************************/
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/* INCLUDES *******************************************************************/
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@ -14,14 +14,15 @@
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/* GLOBALS ********************************************************************/
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/* GLOBALS ********************************************************************/
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UCHAR HalpIopmSaveBuffer[0x2000];
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ULONG HalpSavedPfn;
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ULONG HalpSavedPfn;
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HARDWARE_PTE HalpSavedPte;
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HARDWARE_PTE HalpSavedPte;
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ULONG HalpGpfHandler;
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ULONG HalpGpfHandler;
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ULONG HalpBopHandler;
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ULONG HalpBopHandler;
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USHORT HalpSavedIopmBase;
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PUCHAR HalpSavedIoMap;
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ULONG HalpSavedEsp0;
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ULONG HalpSavedEsp0;
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USHORT HalpSavedIopmBase;
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PUSHORT HalpSavedIoMap;
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USHORT HalpSavedIoMapData[32][2];
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ULONG HalpSavedIoMapEntries;
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#define GetPdeAddress(x) (PHARDWARE_PTE)(((((ULONG_PTR)(x)) >> 22) << 2) + 0xC0300000)
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#define GetPdeAddress(x) (PHARDWARE_PTE)(((((ULONG_PTR)(x)) >> 22) << 2) + 0xC0300000)
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#define GetPteAddress(x) (PHARDWARE_PTE)(((((ULONG_PTR)(x)) >> 12) << 2) + 0xC0000000)
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#define GetPteAddress(x) (PHARDWARE_PTE)(((((ULONG_PTR)(x)) >> 12) << 2) + 0xC0000000)
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@ -30,27 +31,61 @@ ULONG HalpSavedEsp0;
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VOID
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VOID
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NTAPI
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NTAPI
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HalpStoreAndClearIopm(IN PUCHAR IoMap)
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HalpStoreAndClearIopm(VOID)
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{
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{
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ULONG i;
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ULONG i, j;
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PUSHORT Entry = HalpSavedIoMap;
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/* Backup the old I/O Map */
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RtlCopyMemory(HalpIopmSaveBuffer, IoMap, 0x2000);
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/* Erase the current one */
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//
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for (i = 0; i < 0x2000; i++) IoMap[i] = 0;
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// Loop the I/O Map
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for (i = 0x2000; i < 0x2004; i++) IoMap[i] = 0xFF;
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//
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for (i = j = 0; i < (IOPM_SIZE) / 2; i++)
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{
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//
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// Check for non-FFFF entry
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//
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if (*Entry != 0xFFFF)
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{
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//
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// Save it
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//
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ASSERT(j < 32);
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HalpSavedIoMapData[j][0] = i;
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HalpSavedIoMapData[j][1] = *Entry;
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}
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//
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// Clear it
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//
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*Entry++ = 0;
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}
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//
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// Terminate it
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//
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while (i++ < (IOPM_FULL_SIZE / 2)) *Entry++ = 0xFFFF;
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//
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// Return the entries we saved
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//
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HalpSavedIoMapEntries = j;
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}
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}
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VOID
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VOID
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NTAPI
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NTAPI
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HalpRestoreIopm(IN PUCHAR IoMap)
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HalpRestoreIopm(VOID)
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{
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{
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ULONG i;
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ULONG i = HalpSavedIoMapEntries;
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/* Restore the backed up copy, and initialize it */
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//
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RtlCopyMemory(IoMap, HalpIopmSaveBuffer, 0x2000);
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// Set default state
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for (i = 0x2000; i < 0x2004; i++) IoMap[i] = 0xFF;
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//
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RtlFillMemory(HalpSavedIoMap, 0xFF, IOPM_FULL_SIZE);
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//
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// Restore the backed up copy, and initialize it
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//
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while (i--) HalpSavedIoMap[HalpSavedIoMapData[i][0]] = HalpSavedIoMapData[i][1];
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}
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}
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VOID
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VOID
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@ -134,8 +169,8 @@ NTAPI
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HalpSetupRealModeIoPermissionsAndTask(VOID)
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HalpSetupRealModeIoPermissionsAndTask(VOID)
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{
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{
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/* Save a copy of the I/O Map and delete it */
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/* Save a copy of the I/O Map and delete it */
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HalpSavedIoMap = (PUCHAR)&(KeGetPcr()->TSS->IoMaps[0]);
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HalpSavedIoMap = (PUSHORT)&(KeGetPcr()->TSS->IoMaps[0]);
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HalpStoreAndClearIopm(HalpSavedIoMap);
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HalpStoreAndClearIopm();
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/* Save the IOPM and switch to the real-mode one */
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/* Save the IOPM and switch to the real-mode one */
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HalpSavedIopmBase = KeGetPcr()->TSS->IoMapBase;
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HalpSavedIopmBase = KeGetPcr()->TSS->IoMapBase;
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@ -166,7 +201,7 @@ HalpRestoreIoPermissionsAndTask(VOID)
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KeGetPcr()->TSS->Esp0 = HalpSavedEsp0;
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KeGetPcr()->TSS->Esp0 = HalpSavedEsp0;
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/* Restore the I/O Map */
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/* Restore the I/O Map */
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HalpRestoreIopm(HalpSavedIoMap);
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HalpRestoreIopm();
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/* Restore the IOPM */
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/* Restore the IOPM */
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KeGetPcr()->TSS->IoMapBase = HalpSavedIopmBase;
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KeGetPcr()->TSS->IoMapBase = HalpSavedIopmBase;
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@ -129,7 +129,11 @@ Author:
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//
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//
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// IOPM Definitions
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// IOPM Definitions
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//
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//
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#define IOPM_COUNT 1
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#define IOPM_SIZE 8192
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#define IOPM_FULL_SIZE 8196
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#define IO_ACCESS_MAP_NONE 0
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#define IO_ACCESS_MAP_NONE 0
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#define IOPM_DIRECTION_MAP_SIZE 32
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#define IOPM_OFFSET FIELD_OFFSET(KTSS, IoMaps[0].IoMap)
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#define IOPM_OFFSET FIELD_OFFSET(KTSS, IoMaps[0].IoMap)
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#define KiComputeIopmOffset(MapNumber) \
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#define KiComputeIopmOffset(MapNumber) \
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(MapNumber == IO_ACCESS_MAP_NONE) ? \
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(MapNumber == IO_ACCESS_MAP_NONE) ? \
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@ -708,8 +712,8 @@ typedef struct _KIPCR
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//
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//
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typedef struct _KiIoAccessMap
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typedef struct _KiIoAccessMap
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{
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{
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UCHAR DirectionMap[32];
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UCHAR DirectionMap[IOPM_DIRECTION_MAP_SIZE];
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UCHAR IoMap[8196];
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UCHAR IoMap[IOPM_FULL_SIZE];
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} KIIO_ACCESS_MAP;
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} KIIO_ACCESS_MAP;
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typedef struct _KTSS
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typedef struct _KTSS
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USHORT Reserved8;
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USHORT Reserved8;
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USHORT Flags;
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USHORT Flags;
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USHORT IoMapBase;
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USHORT IoMapBase;
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KIIO_ACCESS_MAP IoMaps[1];
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KIIO_ACCESS_MAP IoMaps[IOPM_COUNT];
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UCHAR IntDirectionMap[32];
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UCHAR IntDirectionMap[IOPM_DIRECTION_MAP_SIZE];
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} KTSS, *PKTSS;
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} KTSS, *PKTSS;
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//
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//
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@ -582,11 +582,12 @@ KiInitializeTSS2(IN PKTSS Tss,
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}
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}
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/* Now clear the I/O Map */
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/* Now clear the I/O Map */
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RtlFillMemory(Tss->IoMaps[0].IoMap, 8096, -1);
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ASSERT(IOPM_COUNT == 1);
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RtlFillMemory(Tss->IoMaps[0].IoMap, IOPM_FULL_SIZE, 0xFF);
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/* Initialize Interrupt Direction Maps */
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/* Initialize Interrupt Direction Maps */
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p = (PUCHAR)(Tss->IoMaps[0].DirectionMap);
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p = (PUCHAR)(Tss->IoMaps[0].DirectionMap);
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RtlZeroMemory(p, 32);
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RtlZeroMemory(p, IOPM_DIRECTION_MAP_SIZE);
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/* Add DPMI support for interrupts */
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/* Add DPMI support for interrupts */
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p[0] = 4;
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p[0] = 4;
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/* Initialize the default Interrupt Direction Map */
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/* Initialize the default Interrupt Direction Map */
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p = Tss->IntDirectionMap;
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p = Tss->IntDirectionMap;
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RtlZeroMemory(Tss->IntDirectionMap, 32);
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RtlZeroMemory(Tss->IntDirectionMap, IOPM_DIRECTION_MAP_SIZE);
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/* Add DPMI support */
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/* Add DPMI support */
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p[0] = 4;
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p[0] = 4;
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