mirror of
https://github.com/reactos/reactos.git
synced 2025-08-05 17:33:01 +00:00
- Implemented Ke386TestAndClearBit and Ke386TestAndSetBit.
- Fixed some interlocked functions. svn path=/trunk/; revision=12688
This commit is contained in:
parent
37d9e18817
commit
2d760db23f
2 changed files with 86 additions and 23 deletions
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@ -1,14 +1,30 @@
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/* $Id: interlck.c,v 1.10 2004/12/12 17:48:20 hbirr Exp $
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/* $Id$
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*
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*
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* reactos/ntoskrnl/ex/i386/interlck.c
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* reactos/ntoskrnl/ex/i386/interlck.c
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*
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*
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*/
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*/
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#include <ntoskrnl.h>
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#include <ntoskrnl.h>
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#ifdef LOCK
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#undef LOCK
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#endif
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#if defined(__GNUC__)
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#ifdef MP
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#ifdef MP
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#define LOCK "lock "
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#define LOCK "lock ; "
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#else
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#else
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#define LOCK " "
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#define LOCK ""
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#endif
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#elif defined(_MSC_VER)
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#ifdef MP
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#define LOCK lock
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#else
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#define LOCK
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#endif
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#endif
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#endif
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#if defined(__GNUC__)
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#if defined(__GNUC__)
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@ -21,6 +37,7 @@ Exfi386InterlockedIncrementLong(IN PLONG Addend);
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__asm__("\n\t.global @Exfi386InterlockedIncrementLong@4\n\t"
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__asm__("\n\t.global @Exfi386InterlockedIncrementLong@4\n\t"
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"@Exfi386InterlockedIncrementLong@4:\n\t"
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"@Exfi386InterlockedIncrementLong@4:\n\t"
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LOCK
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"addl $1,(%ecx)\n\t"
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"addl $1,(%ecx)\n\t"
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"lahf\n\t"
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"lahf\n\t"
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"andl $0xC000, %eax\n\t"
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"andl $0xC000, %eax\n\t"
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@ -35,7 +52,7 @@ __declspec(naked)
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INTERLOCKED_RESULT FASTCALL
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INTERLOCKED_RESULT FASTCALL
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Exfi386InterlockedIncrementLong(IN PLONG Addend)
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Exfi386InterlockedIncrementLong(IN PLONG Addend)
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{
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{
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__asm add ecx, 1
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__asm LOCK add dword ptr [ecx], 1
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__asm lahf
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__asm lahf
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__asm and eax, 0xC000
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__asm and eax, 0xC000
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__asm ret
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__asm ret
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@ -56,6 +73,7 @@ Exfi386InterlockedDecrementLong(IN PLONG Addend);
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__asm__("\n\t.global @Exfi386InterlockedDecrementLong@4\n\t"
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__asm__("\n\t.global @Exfi386InterlockedDecrementLong@4\n\t"
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"@Exfi386InterlockedDecrementLong@4:\n\t"
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"@Exfi386InterlockedDecrementLong@4:\n\t"
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LOCK
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"subl $1,(%ecx)\n\t"
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"subl $1,(%ecx)\n\t"
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"lahf\n\t"
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"lahf\n\t"
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"andl $0xC000, %eax\n\t"
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"andl $0xC000, %eax\n\t"
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@ -70,7 +88,7 @@ __declspec(naked)
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INTERLOCKED_RESULT FASTCALL
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INTERLOCKED_RESULT FASTCALL
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Exfi386InterlockedDecrementLong(IN PLONG Addend)
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Exfi386InterlockedDecrementLong(IN PLONG Addend)
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{
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{
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__asm sub ecx, 1
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__asm LOCK sub dword ptr [ecx], 1
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__asm lahf
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__asm lahf
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__asm and eax, 0xC000
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__asm and eax, 0xC000
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__asm ret
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__asm ret
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@ -92,7 +110,8 @@ Exfi386InterlockedExchangeUlong(IN PULONG Target,
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__asm__("\n\t.global @Exfi386InterlockedExchangeUlong@8\n\t"
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__asm__("\n\t.global @Exfi386InterlockedExchangeUlong@8\n\t"
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"@Exfi386InterlockedExchangeUlong@8:\n\t"
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"@Exfi386InterlockedExchangeUlong@8:\n\t"
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LOCK"xchgl %edx,(%ecx)\n\t"
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LOCK
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"xchgl %edx,(%ecx)\n\t"
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"movl %edx,%eax\n\t"
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"movl %edx,%eax\n\t"
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"ret\n\t");
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"ret\n\t");
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@ -106,7 +125,7 @@ ULONG FASTCALL
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Exfi386InterlockedExchangeUlong(IN PULONG Target,
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Exfi386InterlockedExchangeUlong(IN PULONG Target,
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IN ULONG Value)
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IN ULONG Value)
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{
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{
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__asm xchg [ecx], edx
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__asm LOCK xchg [ecx], edx
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__asm mov eax, edx
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__asm mov eax, edx
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__asm ret
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__asm ret
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}
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}
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@ -124,6 +143,7 @@ Exi386InterlockedIncrementLong(IN PLONG Addend);
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__asm__("\n\t.global _Exi386InterlockedIncrementLong@4\n\t"
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__asm__("\n\t.global _Exi386InterlockedIncrementLong@4\n\t"
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"_Exi386InterlockedIncrementLong@4:\n\t"
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"_Exi386InterlockedIncrementLong@4:\n\t"
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"movl 4(%esp),%eax\n\t"
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"movl 4(%esp),%eax\n\t"
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LOCK
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"addl $1,(%eax)\n\t"
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"addl $1,(%eax)\n\t"
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"lahf\n\t"
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"lahf\n\t"
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"andl $0xC000, %eax\n\t"
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"andl $0xC000, %eax\n\t"
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@ -136,7 +156,7 @@ INTERLOCKED_RESULT STDCALL
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Exi386InterlockedIncrementLong(IN PLONG Addend)
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Exi386InterlockedIncrementLong(IN PLONG Addend)
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{
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{
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__asm mov eax, Addend
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__asm mov eax, Addend
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__asm add [eax], 1
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__asm LOCK add dword ptr [eax], 1
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__asm lahf
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__asm lahf
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__asm and eax, 0xC000
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__asm and eax, 0xC000
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__asm ret 4
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__asm ret 4
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@ -155,6 +175,7 @@ Exi386InterlockedDecrementLong(IN PLONG Addend);
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__asm__("\n\t.global _Exi386InterlockedDecrementLong@4\n\t"
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__asm__("\n\t.global _Exi386InterlockedDecrementLong@4\n\t"
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"_Exi386InterlockedDecrementLong@4:\n\t"
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"_Exi386InterlockedDecrementLong@4:\n\t"
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"movl 4(%esp),%eax\n\t"
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"movl 4(%esp),%eax\n\t"
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LOCK
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"subl $1,(%eax)\n\t"
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"subl $1,(%eax)\n\t"
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"lahf\n\t"
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"lahf\n\t"
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"andl $0xC000, %eax\n\t"
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"andl $0xC000, %eax\n\t"
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@ -167,7 +188,7 @@ INTERLOCKED_RESULT STDCALL
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Exi386InterlockedDecrementLong(IN PLONG Addend)
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Exi386InterlockedDecrementLong(IN PLONG Addend)
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{
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{
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__asm mov eax, Addend
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__asm mov eax, Addend
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__asm sub [eax], 1
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__asm LOCK sub dword ptr [eax], 1
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__asm lahf
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__asm lahf
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__asm and eax, 0xC000
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__asm and eax, 0xC000
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__asm ret 4
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__asm ret 4
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@ -188,7 +209,8 @@ __asm__("\n\t.global _Exi386InterlockedExchangeUlong@8\n\t"
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"_Exi386InterlockedExchangeUlong@8:\n\t"
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"_Exi386InterlockedExchangeUlong@8:\n\t"
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"movl 4(%esp),%edx\n\t"
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"movl 4(%esp),%edx\n\t"
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"movl 8(%esp),%eax\n\t"
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"movl 8(%esp),%eax\n\t"
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LOCK"xchgl %eax,(%edx)\n\t"
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LOCK
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"xchgl %eax,(%edx)\n\t"
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"ret $8\n\t");
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"ret $8\n\t");
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#elif defined(_MSC_VER)
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#elif defined(_MSC_VER)
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@ -200,7 +222,7 @@ Exi386InterlockedExchangeUlong(IN PULONG Target,
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{
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{
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__asm mov edx, Value
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__asm mov edx, Value
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__asm mov eax, Target
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__asm mov eax, Target
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__asm xchg [edx], eax
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__asm LOCK xchg [edx], eax
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__asm ret 8
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__asm ret 8
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}
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}
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@ -231,7 +253,8 @@ InterlockedIncrement(PLONG Addend);
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__asm__("\n\t.global @InterlockedIncrement@4\n\t"
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__asm__("\n\t.global @InterlockedIncrement@4\n\t"
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"@InterlockedIncrement@4:\n\t"
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"@InterlockedIncrement@4:\n\t"
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"movl $1,%eax\n\t"
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"movl $1,%eax\n\t"
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LOCK"xaddl %eax,(%ecx)\n\t"
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LOCK
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"xaddl %eax,(%ecx)\n\t"
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"incl %eax\n\t"
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"incl %eax\n\t"
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"ret\n\t");
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"ret\n\t");
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@ -244,7 +267,7 @@ LONG FASTCALL
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InterlockedIncrement(PLONG Addend)
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InterlockedIncrement(PLONG Addend)
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{
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{
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__asm mov eax, 1
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__asm mov eax, 1
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__asm xadd [ecx], eax
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__asm LOCK xadd [ecx], eax
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__asm inc eax
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__asm inc eax
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__asm ret
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__asm ret
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}
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}
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__asm__("\n\t.global @InterlockedDecrement@4\n\t"
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__asm__("\n\t.global @InterlockedDecrement@4\n\t"
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"@InterlockedDecrement@4:\n\t"
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"@InterlockedDecrement@4:\n\t"
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"movl $-1,%eax\n\t"
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"movl $-1,%eax\n\t"
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LOCK"xaddl %eax,(%ecx)\n\t"
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LOCK
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"xaddl %eax,(%ecx)\n\t"
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"decl %eax\n\t"
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"decl %eax\n\t"
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"ret\n\t");
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"ret\n\t");
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@ -282,7 +306,7 @@ LONG FASTCALL
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InterlockedDecrement(PLONG Addend)
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InterlockedDecrement(PLONG Addend)
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{
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{
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__asm mov eax, -1
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__asm mov eax, -1
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__asm xadd [ecx], eax
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__asm LOCK xadd [ecx], eax
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__asm dec eax
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__asm dec eax
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__asm ret
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__asm ret
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}
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}
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__asm__("\n\t.global @InterlockedExchange@8\n\t"
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__asm__("\n\t.global @InterlockedExchange@8\n\t"
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"@InterlockedExchange@8:\n\t"
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"@InterlockedExchange@8:\n\t"
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LOCK"xchgl %edx,(%ecx)\n\t"
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LOCK
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"xchgl %edx,(%ecx)\n\t"
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"movl %edx,%eax\n\t"
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"movl %edx,%eax\n\t"
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"ret\n\t");
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"ret\n\t");
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@ -320,7 +345,7 @@ LONG FASTCALL
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InterlockedExchange(PLONG Target,
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InterlockedExchange(PLONG Target,
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LONG Value)
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LONG Value)
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{
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{
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__asm xchg [ecx], edx
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__asm LOCK xchg [ecx], edx
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__asm mov eax, edx
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__asm mov eax, edx
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__asm ret
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__asm ret
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}
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}
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@ -343,7 +368,8 @@ InterlockedExchangeAdd(PLONG Addend,
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__asm__("\n\t.global @InterlockedExchangeAdd@8\n\t"
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__asm__("\n\t.global @InterlockedExchangeAdd@8\n\t"
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"@InterlockedExchangeAdd@8:\n\t"
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"@InterlockedExchangeAdd@8:\n\t"
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LOCK"xaddl %edx,(%ecx)\n\t"
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LOCK
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"xaddl %edx,(%ecx)\n\t"
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"movl %edx,%eax\n\t"
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"movl %edx,%eax\n\t"
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"ret\n\t");
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"ret\n\t");
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@ -356,7 +382,7 @@ LONG FASTCALL
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InterlockedExchangeAdd(PLONG Addend,
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InterlockedExchangeAdd(PLONG Addend,
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LONG Value)
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LONG Value)
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{
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{
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__asm xadd [ecx], edx
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__asm LOCK xadd [ecx], edx
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__asm mov eax, edx
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__asm mov eax, edx
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__asm ret
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__asm ret
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}
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}
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@ -380,7 +406,8 @@ InterlockedCompareExchange(PLONG Destination,
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__asm__("\n\t.global @InterlockedCompareExchange@12\n\t"
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__asm__("\n\t.global @InterlockedCompareExchange@12\n\t"
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"@InterlockedCompareExchange@12:\n\t"
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"@InterlockedCompareExchange@12:\n\t"
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"movl 4(%esp),%eax\n\t"
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"movl 4(%esp),%eax\n\t"
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LOCK"cmpxchg %edx,(%ecx)\n\t"
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LOCK
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"cmpxchg %edx,(%ecx)\n\t"
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"ret $4\n\t");
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"ret $4\n\t");
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#elif defined(_MSC_VER)
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#elif defined(_MSC_VER)
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@ -392,7 +419,7 @@ InterlockedCompareExchange(PLONG Destination,
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LONG Comperand)
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LONG Comperand)
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{
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{
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__asm mov eax, Comperand
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__asm mov eax, Comperand
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__asm cmpxchg [ecx], edx
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__asm LOCK cmpxchg [ecx], edx
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__asm ret 4
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__asm ret 4
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}
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}
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@ -418,7 +445,8 @@ __asm__("\n\t.global @ExfpInterlockedExchange64@8\n\t"
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"\n1:\t"
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"\n1:\t"
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"movl (%esi),%eax\n\t"
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"movl (%esi),%eax\n\t"
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"movl 4(%esi),%edx\n\t"
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"movl 4(%esi),%edx\n\t"
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LOCK"cmpxchg8b (%esi)\n\t"
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LOCK
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"cmpxchg8b (%esi)\n\t"
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"jnz 1b\n\t"
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"jnz 1b\n\t"
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"popl %esi\n\t"
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"popl %esi\n\t"
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"popl %ebx\n\t"
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"popl %ebx\n\t"
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@ -447,7 +475,8 @@ __asm__("\n\t.global @ExfInterlockedCompareExchange64@12\n\t"
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"movl 12(%esp),%edx\n\t"
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"movl 12(%esp),%edx\n\t"
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"movl (%edx),%eax\n\t"
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"movl (%edx),%eax\n\t"
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"movl 4(%edx),%edx\n\t"
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"movl 4(%edx),%edx\n\t"
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LOCK"cmpxchg8b (%esi)\n\t"
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LOCK
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"cmpxchg8b (%esi)\n\t"
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"popl %esi\n\t"
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"popl %esi\n\t"
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"popl %ebx\n\t"
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"popl %ebx\n\t"
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"ret $4\n\t");
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"ret $4\n\t");
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@ -192,6 +192,13 @@ VOID KeFreeGdtSelector(ULONG Entry);
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VOID
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VOID
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NtEarlyInitVdm(VOID);
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NtEarlyInitVdm(VOID);
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#ifdef MP
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#define LOCK "lock ; "
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#else
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#define LOCK ""
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#endif
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#if defined(__GNUC__)
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#if defined(__GNUC__)
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#define Ke386DisableInterrupts() __asm__("cli\n\t");
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#define Ke386DisableInterrupts() __asm__("cli\n\t");
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#define Ke386EnableInterrupts() __asm__("sti\n\t");
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#define Ke386EnableInterrupts() __asm__("sti\n\t");
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@ -219,6 +226,33 @@ NtEarlyInitVdm(VOID);
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#define Ke386GetCr4() _Ke386GetCr(4)
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#define Ke386GetCr4() _Ke386GetCr(4)
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#define Ke386SetCr4(X) _Ke386SetCr(4,X)
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#define Ke386SetCr4(X) _Ke386SetCr(4,X)
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static inline LONG Ke386TestAndClearBit(ULONG BitPos, volatile PULONG Addr)
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{
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LONG OldBit;
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__asm__ __volatile__(LOCK
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"btrl %2,%1\n\t"
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"sbbl %0,%0\n\t"
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:"=r" (OldBit),"=m" (*Addr)
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:"Ir" (BitPos)
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: "memory");
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return OldBit;
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}
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static inline LONG Ke386TestAndSetBit(ULONG BitPos, volatile PULONG Addr)
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{
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LONG OldBit;
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__asm__ __volatile__(LOCK
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"btsl %2,%1\n\t"
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"sbbl %0,%0\n\t"
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:"=r" (OldBit),"=m" (*Addr)
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:"Ir" (BitPos)
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: "memory");
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return OldBit;
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}
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|
||||||
|
|
||||||
static inline void Ki386Cpuid(ULONG Op, PULONG Eax, PULONG Ebx, PULONG Ecx, PULONG Edx)
|
static inline void Ki386Cpuid(ULONG Op, PULONG Eax, PULONG Ebx, PULONG Ecx, PULONG Edx)
|
||||||
{
|
{
|
||||||
__asm__("cpuid"
|
__asm__("cpuid"
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue