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- Change ARM loading architecture to match EFI/Firmware model. LLB provides "firmware" routines, FreeLDR obtains "firmware" routines from the ARM block, and sets them as the Machine VTable. All board-specific FreeLDR code gone now.

Browse source 
- Start work on UI. Serial output is now only for debugging, not usual console.
- Need PL045 Keyboard code to handle KbHit/GetCh.
- Have PL011 code ready for MachVideo routines, coming soon...
- Start stub of environment functions.


svn path=/trunk/; revision=45379
This commit is contained in:
evb 2010-02-02 17:21:19 +00:00
parent 28bb8f1a56
commit 2ce8b56e7c
21 changed files with 183 additions and 566 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
reactos/boot/armllb/armllb.rbuild
View file

@ -21,6 +21,8 @@
<file first="true">boot.s</file> <file first="true">boot.s</file>
<file>main.c</file> <file>main.c</file>
<file>crtsupp.c</file> <file>crtsupp.c</file>
<file>envir.c</file>
<file>fw.c</file>
<directory name="hw"> <directory name="hw">
<file>serial.c</file> <file>serial.c</file>
<file>video.c</file> <file>video.c</file>

18
reactos/boot/armllb/crtsupp.c
View file

@ -11,11 +11,11 @@
int int
putchar(int c) putchar(int c)
{ {
/* Write to the serial port */ /* Write to the screen */
LlbSerialPutChar(c);
/* Write to the screen too */
LlbVideoPutChar(c); LlbVideoPutChar(c);
/* For DEBUGGING ONLY */
LlbSerialPutChar(c);
return 0; return 0;
} }
@ -32,13 +32,9 @@ int printf(const char *fmt, ...)
unsigned int i; unsigned int i;
char printbuffer[1024]; char printbuffer[1024];
va_start (args, fmt); va_start(args, fmt);
i = vsprintf(printbuffer, fmt, args);
/* For this to work, printbuffer must be larger than va_end(args);
* anything we ever want to print.
*/
i = vsprintf (printbuffer, fmt, args);
va_end (args);
/* Print the string */ /* Print the string */
return puts(printbuffer); return puts(printbuffer);

20
reactos/boot/armllb/envir.c Normal file
View file

@ -0,0 +1,20 @@
/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/envir.c
* PURPOSE: LLB Environment Variable Routines
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
PCHAR
NTAPI
LlbEnvRead(IN PCHAR ValueName)
{
/* FIXME: HACK */
return "RAMDISK";
}
/* EOF */

36
reactos/boot/armllb/fw.c Normal file
View file

@ -0,0 +1,36 @@
/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/fw.c
* PURPOSE: LLB Firmware Routines (accessible by OS Loader)
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
VOID
LlbFwPutChar(INT Ch)
{
/* Just call directly the video function */
LlbVideoPutChar(Ch);
/* DEBUG ONLY */
LlbSerialPutChar(Ch);
}
BOOLEAN
LlbFwKbHit(VOID)
{
/* Not yet implemented */
return FALSE;
}
INT
LlbFwGetCh(VOID)
{
/* Not yet implemented */
while (TRUE);
return 0;
}
/* EOF */

11
reactos/boot/armllb/hw/versatile/hwinfo.c
View file

@ -47,15 +47,4 @@ LlbHwBuildMemoryMap(IN PBIOS_MEMORY_MAP MemoryMap)
LlbAllocateMemoryEntry(BiosMemoryReserved, 0x10000000, 128 * 1024 * 1024); LlbAllocateMemoryEntry(BiosMemoryReserved, 0x10000000, 128 * 1024 * 1024);
} }
//
// hwenv.c? or environment.c? or both?
//
PCHAR
NTAPI
LlbHwEnvRead(IN PCHAR Option)
{
/* HACKFIX */
return "RAMDISK";
}
/* EOF */ /* EOF */

38
reactos/boot/armllb/hw/video.c
View file

@ -268,6 +268,28 @@ CHAR LlbHwBootFont[] =
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
}; };
#if 0
USHORT ColorPalette[16] =
{
RGB565(0x00, 0x00, 0x00),
RGB565(0x00, 0x00, 0xAA),
RGB565(0x00, 0xAA, 0x00),
RGB565(0x00, 0xAA, 0xAA),
RGB565(0xAA, 0x00, 0x00),
RGB565(0xAA, 0x00, 0xAA),
RGB565(0xAA, 0x55, 0x00),
RGB565(0xAA, 0xAA, 0xAA),
RGB565(0x55, 0x55, 0x55),
RGB565(0x55, 0x55, 0xFF),
RGB565(0x55, 0xFF, 0x55),
RGB565(0x55, 0xFF, 0xFF),
RGB565(0xFF, 0x55, 0x55),
RGB565(0xFF, 0x55, 0xFF),
RGB565(0xFF, 0xFF, 0x55),
RGB565(0xFF, 0xFF, 0xFF),
};
#endif
ULONG ScreenCursor; ULONG ScreenCursor;
VOID VOID
@ -312,7 +334,7 @@ LlbVideoDrawChar(IN CHAR c,
VOID VOID
NTAPI NTAPI
LlbVideoClearScreen(VOID) LlbVideoClearScreen(IN BOOLEAN OsLoader)
{ {
ULONG ScreenSize, p; ULONG ScreenSize, p;
ULONG BackColor; ULONG BackColor;
@ -323,8 +345,17 @@ LlbVideoClearScreen(VOID)
ScreenCursor = 0; ScreenCursor = 0;
/* Backcolor on this machine */ /* Backcolor on this machine */
BackColor = LlbHwVideoCreateColor(14, 0, 82); if (OsLoader)
BackColor = (BackColor << 16) | BackColor; {
/* Black */
BackColor = 0;
}
else
{
/* Deep blue */
BackColor = LlbHwVideoCreateColor(14, 0, 82);
BackColor = (BackColor << 16) | BackColor;
}
/* Screen size on this machine */ /* Screen size on this machine */
ScreenSize = LlbHwGetScreenWidth() * LlbHwGetScreenHeight(); ScreenSize = LlbHwGetScreenWidth() * LlbHwGetScreenHeight();
@ -369,3 +400,4 @@ LlbVideoPutChar(IN CHAR c)
} }
/* EOF */ /* EOF */

24
reactos/boot/armllb/inc/fw.h Executable file
View file

@ -0,0 +1,24 @@
/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/inc/fw.h
* PURPOSE: LLB Firmware Functions
* PROGRAMMERS: ReactOS Portable Systems Group
*/
VOID
LlbFwPutChar(
INT Ch
);
BOOLEAN
LlbFwKbHit(
VOID
);
INT
LlbFwGetCh(
VOID
);
/* EOF */

6
reactos/boot/armllb/inc/hw.h
View file

@ -92,12 +92,6 @@ LlbHwLoadOsLoaderFromRam(
VOID VOID
); );
PCHAR
NTAPI
LlbHwEnvRead(
IN PCHAR Option
);
#ifdef _VERSATILE_ #ifdef _VERSATILE_
#include "versa.h" #include "versa.h"
#elif _OMAP3_ #elif _OMAP3_

13
reactos/boot/armllb/inc/osloader.h
View file

@ -14,6 +14,7 @@ VOID (*POSLOADER_INIT)(
IN PVOID BoardInit IN PVOID BoardInit
); );
#ifndef __REGISTRY_H
// //
// Type of memory detected by LLB // Type of memory detected by LLB
// //
@ -35,12 +36,13 @@ typedef struct
ULONG Type; ULONG Type;
ULONG Reserved; ULONG Reserved;
} BIOS_MEMORY_MAP, *PBIOS_MEMORY_MAP; } BIOS_MEMORY_MAP, *PBIOS_MEMORY_MAP;
#endif
// //
// Information sent from LLB to OS Loader // Information sent from LLB to OS Loader
// //
#define ARM_BOARD_CONFIGURATION_MAJOR_VERSION 1 #define ARM_BOARD_CONFIGURATION_MAJOR_VERSION 1
#define ARM_BOARD_CONFIGURATION_MINOR_VERSION 1 #define ARM_BOARD_CONFIGURATION_MINOR_VERSION 2
typedef struct _ARM_BOARD_CONFIGURATION_BLOCK typedef struct _ARM_BOARD_CONFIGURATION_BLOCK
{ {
ULONG MajorVersion; ULONG MajorVersion;
@ -52,6 +54,9 @@ typedef struct _ARM_BOARD_CONFIGURATION_BLOCK
ULONG MemoryMapEntryCount; ULONG MemoryMapEntryCount;
PBIOS_MEMORY_MAP MemoryMap; PBIOS_MEMORY_MAP MemoryMap;
CHAR CommandLine[256]; CHAR CommandLine[256];
PVOID ConsPutChar;
PVOID ConsKbHit;
PVOID ConsGetCh;
} ARM_BOARD_CONFIGURATION_BLOCK, *PARM_BOARD_CONFIGURATION_BLOCK; } ARM_BOARD_CONFIGURATION_BLOCK, *PARM_BOARD_CONFIGURATION_BLOCK;
VOID VOID
@ -92,4 +97,10 @@ LlbBoot(
IN PCHAR CommandLine IN PCHAR CommandLine
); );
PCHAR
NTAPI
LlbEnvRead(
IN PCHAR Option
);
/* EOF */ /* EOF */

1
reactos/boot/armllb/inc/precomp.h
View file

@ -12,6 +12,7 @@
#include "machtype.h" #include "machtype.h"
#include "osloader.h" #include "osloader.h"
#include "hw.h" #include "hw.h"
#include "fw.h"
#include "serial.h" #include "serial.h"
#include "video.h" #include "video.h"

2
reactos/boot/armllb/inc/video.h
View file

@ -9,7 +9,7 @@
VOID VOID
NTAPI NTAPI
LlbVideoClearScreen( LlbVideoClearScreen(
VOID IN BOOLEAN OsLoader
); );
VOID VOID

16
reactos/boot/armllb/main.c
View file

@ -15,7 +15,7 @@ LlbStartup(VOID)
LlbHwInitialize(); LlbHwInitialize();
/* Clean up the screen */ /* Clean up the screen */
LlbVideoClearScreen(); LlbVideoClearScreen(FALSE);
/* Print header */ /* Print header */
printf("ReactOS ARM Low-Level Boot Loader [" __DATE__ " "__TIME__ "]\n"); printf("ReactOS ARM Low-Level Boot Loader [" __DATE__ " "__TIME__ "]\n");
@ -25,4 +25,18 @@ LlbStartup(VOID)
while (TRUE); while (TRUE);
} }
VOID
DbgPrint(const char *fmt, ...)
{
va_list args;
unsigned int i;
char Buffer[1024];
va_start(args, fmt);
i = vsprintf(Buffer, fmt, args);
va_end(args);
while (*Buffer) LlbSerialPutChar(*Buffer);
}
/* EOF */ /* EOF */

9
reactos/boot/armllb/os/loader.c
View file

@ -69,6 +69,11 @@ LlbBuildArmBlock(VOID)
/* Now load the memory map */ /* Now load the memory map */
ArmBlock.MemoryMap = MemoryMap; ArmBlock.MemoryMap = MemoryMap;
/* Write firmware callbacks */
ArmBlock.ConsPutChar = LlbFwPutChar;
ArmBlock.ConsKbHit = LlbFwKbHit;
ArmBlock.ConsGetCh = LlbFwGetCh;
} }
VOID VOID
@ -89,7 +94,7 @@ LlbLoadOsLoader(VOID)
PCHAR BootDevice; PCHAR BootDevice;
/* Read the current boot device */ /* Read the current boot device */
BootDevice = LlbHwEnvRead("boot-device"); BootDevice = LlbEnvRead("boot-device");
printf("Loading OS Loader from: %s...\n", BootDevice); printf("Loading OS Loader from: %s...\n", BootDevice);
if (!strcmp(BootDevice, "NAND")) if (!strcmp(BootDevice, "NAND"))
{ {
@ -109,7 +114,7 @@ LlbLoadOsLoader(VOID)
{ {
//todo //todo
} }
printf("OS Loader loaded at 0x%p...JUMP!\n", LoaderInit); printf("OS Loader loaded at 0x%p...JUMP!\n\n\n\n\n", LoaderInit);
} }
VOID VOID

130
reactos/boot/freeldr/freeldr/arch/arm/ferouart.c
View file

@ -1,130 +0,0 @@
/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/freeldr/arch/arm/ferouart.c
* PURPOSE: Implements code for Feroceon boards using the 16550 UART
* PROGRAMMERS: ReactOS Portable Systems Group
*/
/* INCLUDES *******************************************************************/
#include <freeldr.h>
/* GLOBALS ********************************************************************/
//
// UART Registers
//
#define UART0_RBR (ArmBoardBlock->UartRegisterBase + 0x00)
#define UART0_THR UART0_RBR
#define UART0_IER (ArmBoardBlock->UartRegisterBase + 0x04)
#define UART0_FCR (ArmBoardBlock->UartRegisterBase + 0x08)
#define UART0_LCR (ArmBoardBlock->UartRegisterBase + 0x0C)
#define UART0_MCR (ArmBoardBlock->UartRegisterBase + 0x10)
#define UART0_LSR (ArmBoardBlock->UartRegisterBase + 0x14)
#define UART0_MSR (ArmBoardBlock->UartRegisterBase + 0x18)
#define UART0_SCR (ArmBoardBlock->UartRegisterBase + 0x1C)
//
// When we enable the divisor latch
//
#define UART0_DLL UART0_RBR
#define UART0_DLM UART0_IER
//
// FCR Values
//
#define FCR_FIFO_EN 0x01
#define FCR_RXSR 0x02
#define FCR_TXSR 0x04
//
// LCR Values
//
#define LCR_WLS_8 0x03
#define LCR_1_STB 0x00
#define LCR_DIVL_EN 0x80
#define LCR_NO_PAR 0x00
//
// LSR Values
//
#define LSR_DR 0x01
#define LSR_THRE 0x20
/* FUNCTIONS ******************************************************************/
VOID
ArmFeroSerialInit(IN ULONG Baudrate)
{
ULONG BaudClock;
//
// Calculate baudrate clock divider to set the baud rate
//
BaudClock = (ArmBoardBlock->ClockRate / 16) / Baudrate;
//
// Disable interrupts
//
WRITE_REGISTER_UCHAR(UART0_IER, 0);
//
// Set the baud rate to 115200 bps
//
WRITE_REGISTER_UCHAR(UART0_LCR, LCR_DIVL_EN);
WRITE_REGISTER_UCHAR(UART0_DLL, BaudClock);
WRITE_REGISTER_UCHAR(UART0_DLM, (BaudClock >> 8) & 0xFF);
//
// Set 8 bits for data, 1 stop bit, no parity
//
WRITE_REGISTER_UCHAR(UART0_LCR, LCR_WLS_8 | LCR_1_STB | LCR_NO_PAR);
//
// Clear and enable FIFO
//
WRITE_REGISTER_UCHAR(UART0_FCR, FCR_FIFO_EN | FCR_RXSR | FCR_TXSR);
}
VOID
ArmFeroPutChar(IN INT Char)
{
//
// Properly support new-lines
//
if (Char == '\n') ArmFeroPutChar('\r');
//
// Wait for ready
//
while ((READ_REGISTER_UCHAR(UART0_LSR) & LSR_THRE) == 0);
//
// Send the character
//
WRITE_REGISTER_UCHAR(UART0_THR, Char);
}
INT
ArmFeroGetCh(VOID)
{
//
// Wait for ready
//
while ((READ_REGISTER_UCHAR(UART0_LSR) & LSR_DR) == 0);
//
// Read the character
//
return READ_REGISTER_UCHAR(UART0_RBR);
}
BOOLEAN
ArmFeroKbHit(VOID)
{
//
// Return if something is ready
//
return ((READ_REGISTER_UCHAR(UART0_LSR) & LSR_DR) != 0);
}

1
reactos/boot/freeldr/freeldr/arch/arm/loader.c
View file

@ -1607,6 +1607,7 @@ FrLdrStartup(IN ULONG Magic)
// //
// Initialize the page directory // Initialize the page directory
// //
while (TRUE);
ArmSetupPageDirectory(); ArmSetupPageDirectory();
// //

44
reactos/boot/freeldr/freeldr/arch/arm/macharm.c
View file

@ -9,6 +9,7 @@
/* INCLUDES *******************************************************************/ /* INCLUDES *******************************************************************/
#include <freeldr.h> #include <freeldr.h>
#define RGB565(r, g, b) (((r >> 3) << 11)| ((g >> 2) << 5)| ((b >> 3) << 0))
/* GLOBALS ********************************************************************/ /* GLOBALS ********************************************************************/
@ -33,7 +34,7 @@ ArmInit(IN PARM_BOARD_CONFIGURATION_BLOCK BootContext)
ArmBoardBlock = BootContext; ArmBoardBlock = BootContext;
// //
// Let's make sure we understand the boot-loader // Let's make sure we understand the LLB
// //
ASSERT(ArmBoardBlock->MajorVersion == ARM_BOARD_CONFIGURATION_MAJOR_VERSION); ASSERT(ArmBoardBlock->MajorVersion == ARM_BOARD_CONFIGURATION_MAJOR_VERSION);
ASSERT(ArmBoardBlock->MinorVersion == ARM_BOARD_CONFIGURATION_MINOR_VERSION); ASSERT(ArmBoardBlock->MinorVersion == ARM_BOARD_CONFIGURATION_MINOR_VERSION);
@ -133,32 +134,21 @@ MachInit(IN PCCH CommandLine)
// //
switch (ArmBoardBlock->BoardType) switch (ArmBoardBlock->BoardType)
{ {
// //
// Check for Feroceon-base boards // Check for Feroceon-base boards
// //
case MACH_TYPE_FEROCEON: case MACH_TYPE_FEROCEON:
//
// These boards use a UART16550. Set us up for 115200 bps
//
ArmFeroSerialInit(115200);
MachVtbl.ConsPutChar = ArmFeroPutChar;
MachVtbl.ConsKbHit = ArmFeroKbHit;
MachVtbl.ConsGetCh = ArmFeroGetCh;
break; break;
// //
// Check for ARM Versatile PB boards // Check for ARM Versatile PB boards
// //
case MACH_TYPE_VERSATILE_PB: case MACH_TYPE_VERSATILE_PB:
// /* Copy Machine Routines from Firmware Table */
// These boards use a PrimeCell UART (PL011) MachVtbl.ConsPutChar = ArmBoardBlock->ConsPutChar;
// MachVtbl.ConsKbHit = ArmBoardBlock->ConsKbHit;
ArmVersaSerialInit(115200); MachVtbl.ConsGetCh = ArmBoardBlock->ConsGetCh;
MachVtbl.ConsPutChar = ArmVersaPutChar;
MachVtbl.ConsKbHit = ArmVersaKbHit;
MachVtbl.ConsGetCh = ArmVersaGetCh;
break; break;
// //
@ -166,14 +156,6 @@ MachInit(IN PCCH CommandLine)
// For now that means only Beagle, but ZOOM and others should be ok too // For now that means only Beagle, but ZOOM and others should be ok too
// //
case MACH_TYPE_OMAP3_BEAGLE: case MACH_TYPE_OMAP3_BEAGLE:
//
// These boards use a UART16550
//
ArmOmap3SerialInit(115200);
MachVtbl.ConsPutChar = ArmOmap3PutChar;
MachVtbl.ConsKbHit = ArmOmap3KbHit;
MachVtbl.ConsGetCh = ArmOmap3GetCh;
break; break;
default: default:
@ -204,5 +186,5 @@ MachInit(IN PCCH CommandLine)
// We can now print to the console // We can now print to the console
// //
TuiPrintf("%s for ARM\n", GetFreeLoaderVersionString()); TuiPrintf("%s for ARM\n", GetFreeLoaderVersionString());
TuiPrintf("Bootargs: %s\n", CommandLine); TuiPrintf("Bootargs: %s\n\n", CommandLine);
} }

162
reactos/boot/freeldr/freeldr/arch/arm/omapuart.c
View file

@ -1,162 +0,0 @@
/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/freeldr/arch/arm/omapuart.c
* PURPOSE: Implements code for TI OMAP3 boards using the 16550 UART
* PROGRAMMERS: ReactOS Portable Systems Group
*/
/* INCLUDES *******************************************************************/
#include <freeldr.h>
/* GLOBALS ********************************************************************/
//
// UART Registers
//
#define UART0_RHR (ArmBoardBlock->UartRegisterBase + 0x00)
#define UART0_THR UART0_RHR
#define UART0_IER (ArmBoardBlock->UartRegisterBase + 0x04)
#define UART0_FCR (ArmBoardBlock->UartRegisterBase + 0x08)
#define UART0_LCR (ArmBoardBlock->UartRegisterBase + 0x0C)
#define UART0_MCR (ArmBoardBlock->UartRegisterBase + 0x10)
#define UART0_LSR (ArmBoardBlock->UartRegisterBase + 0x14)
#define UART0_MDR1 (ArmBoardBlock->UartRegisterBase + 0x20)
//
// When we enable the divisor latch
//
#define UART0_DLL UART0_RHR
#define UART0_DLH UART0_IER
//
// FCR Values
//
#define FCR_FIFO_EN 0x01
#define FCR_RXSR 0x02
#define FCR_TXSR 0x04
//
// LCR Values
//
#define LCR_WLS_8 0x03
#define LCR_1_STB 0x00
#define LCR_DIVL_EN 0x80
#define LCR_NO_PAR 0x00
//
// LSR Values
//
#define LSR_DR 0x01
#define LSR_THRE 0x20
//
// MCR Values
//
#define MCR_DTR 0x01
#define MCR_RTS 0x02
//
// MDR1 Modes
//
#define MDR1_UART16X 1
#define MDR1_SIR 2
#define MDR1_UART16X_AUTO_BAUD 3
#define MDR1_UART13X 4
#define MDR1_MIR 5
#define MDR1_FIR 6
#define MDR1_CIR 7
#define MDR1_DISABLE 8
/* FUNCTIONS ******************************************************************/
VOID
ArmOmap3SerialInit(IN ULONG Baudrate)
{
ULONG BaudClock;
//
// Calculate baudrate clock divider to set the baud rate
//
BaudClock = (ArmBoardBlock->ClockRate / 16) / Baudrate;
//
// Disable serial port
//
WRITE_REGISTER_UCHAR(UART0_MDR1, MDR1_DISABLE);
//
// Disable interrupts
//
WRITE_REGISTER_UCHAR(UART0_IER, 0);
//
// Set the baud rate to 115200 bps
//
WRITE_REGISTER_UCHAR(UART0_LCR, LCR_DIVL_EN);
WRITE_REGISTER_UCHAR(UART0_DLL, BaudClock);
WRITE_REGISTER_UCHAR(UART0_DLH, (BaudClock >> 8) & 0xFF);
//
// Setup loopback
//
WRITE_REGISTER_UCHAR(UART0_MCR, MCR_DTR | MCR_RTS);
//
// Set 8 bits for data, 1 stop bit, no parity
//
WRITE_REGISTER_UCHAR(UART0_LCR, LCR_WLS_8 | LCR_1_STB | LCR_NO_PAR);
//
// Clear and enable FIFO
//
WRITE_REGISTER_UCHAR(UART0_FCR, FCR_FIFO_EN | FCR_RXSR | FCR_TXSR);
//
// Enable serial port
//
WRITE_REGISTER_UCHAR(UART0_MDR1, MDR1_UART16X);
}
VOID
ArmOmap3PutChar(IN INT Char)
{
//
// Properly support new-lines
//
if (Char == '\n') ArmOmap3PutChar('\r');
//
// Wait for ready
//
while ((READ_REGISTER_UCHAR(UART0_LSR) & LSR_THRE) == 0);
//
// Send the character
//
WRITE_REGISTER_UCHAR(UART0_THR, Char);
}
INT
ArmOmap3GetCh(VOID)
{
//
// Wait for ready
//
while ((READ_REGISTER_UCHAR(UART0_LSR) & LSR_DR) == 0);
//
// Read the character
//
return READ_REGISTER_UCHAR(UART0_RHR);
}
BOOLEAN
ArmOmap3KbHit(VOID)
{
//
// Return if something is ready
//
return ((READ_REGISTER_UCHAR(UART0_LSR) & LSR_DR) != 0);
}

132
reactos/boot/freeldr/freeldr/arch/arm/versuart.c
View file

@ -1,132 +0,0 @@
/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/freeldr/arch/arm/versuart.c
* PURPOSE: Implements code for Versatile boards using the PL011 UART
* PROGRAMMERS: ReactOS Portable Systems Group
*/
/* INCLUDES *******************************************************************/
#include <freeldr.h>
/* GLOBALS ********************************************************************/
//
// UART Registers
//
#define UART_PL01x_DR (ArmBoardBlock->UartRegisterBase + 0x00)
#define UART_PL01x_RSR (ArmBoardBlock->UartRegisterBase + 0x04)
#define UART_PL01x_ECR (ArmBoardBlock->UartRegisterBase + 0x04)
#define UART_PL01x_FR (ArmBoardBlock->UartRegisterBase + 0x18)
#define UART_PL011_IBRD (ArmBoardBlock->UartRegisterBase + 0x24)
#define UART_PL011_FBRD (ArmBoardBlock->UartRegisterBase + 0x28)
#define UART_PL011_LCRH (ArmBoardBlock->UartRegisterBase + 0x2C)
#define UART_PL011_CR (ArmBoardBlock->UartRegisterBase + 0x30)
#define UART_PL011_IMSC (ArmBoardBlock->UartRegisterBase + 0x38)
//
// LCR Values
//
#define UART_PL011_LCRH_WLEN_8 0x60
#define UART_PL011_LCRH_FEN 0x10
//
// FCR Values
//
#define UART_PL011_CR_UARTEN 0x01
#define UART_PL011_CR_TXE 0x100
#define UART_PL011_CR_RXE 0x200
//
// LSR Values
//
#define UART_PL01x_FR_RXFE 0x10
#define UART_PL01x_FR_TXFF 0x20
/* FUNCTIONS ******************************************************************/
VOID
ArmVersaSerialInit(IN ULONG Baudrate)
{
ULONG Divider, Remainder, Fraction;
//
// Calculate baudrate clock divider and remainder
//
Divider = ArmBoardBlock->ClockRate / (16 * Baudrate);
Remainder = ArmBoardBlock->ClockRate % (16 * Baudrate);
//
// Calculate the fractional part
//
Fraction = (8 * Remainder / Baudrate) >> 1;
Fraction += (8 * Remainder / Baudrate) & 1;
//
// Disable interrupts
//
WRITE_REGISTER_ULONG(UART_PL011_CR, 0);
//
// Set the baud rate to 115200 bps
//
WRITE_REGISTER_ULONG(UART_PL011_IBRD, Divider);
WRITE_REGISTER_ULONG(UART_PL011_FBRD, Fraction);
//
// Set 8 bits for data, 1 stop bit, no parity, FIFO enabled
//
WRITE_REGISTER_ULONG(UART_PL011_LCRH,
UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN);
//
// Clear and enable FIFO
//
WRITE_REGISTER_ULONG(UART_PL011_CR,
UART_PL011_CR_UARTEN |
UART_PL011_CR_TXE |
UART_PL011_CR_RXE);
}
VOID
ArmVersaPutChar(IN INT Char)
{
//
// Properly support new-lines
//
if (Char == '\n') ArmVersaPutChar('\r');
//
// Wait for ready
//
while ((READ_REGISTER_ULONG(UART_PL01x_FR) & UART_PL01x_FR_TXFF) != 0);
//
// Send the character
//
WRITE_REGISTER_ULONG(UART_PL01x_DR, Char);
}
INT
ArmVersaGetCh(VOID)
{
//
// Wait for ready
//
while ((READ_REGISTER_ULONG(UART_PL01x_FR) & UART_PL01x_FR_RXFE) != 0);
//
// Read the character
//
return READ_REGISTER_ULONG(UART_PL01x_DR);
}
BOOLEAN
ArmVersaKbHit(VOID)
{
//
// Return if something is ready
//
return ((READ_REGISTER_ULONG(UART_PL01x_FR) & UART_PL01x_FR_RXFE) == 0);
}

8
reactos/boot/freeldr/freeldr/freeldr.rbuild
View file

@ -32,8 +32,14 @@
<library>rtl</library> <library>rtl</library>
<library>libcntpr</library> <library>libcntpr</library>
<group linkerset="ld"> <group linkerset="ld">
<linkerflag>-static</linkerflag>
<linkerflag>-lgcc</linkerflag> <linkerflag>-lgcc</linkerflag>
<linkerflag>-Wl,--image-base=0x80FFF000</linkerflag> <if property="SARCH" value="omap3">
<linkerflag>-Wl,--image-base=0x80FFF000</linkerflag>
</if>
<if property="SARCH" value="versatile">
<linkerflag>-Wl,--image-base=0x007FF000</linkerflag>
</if>
</group> </group>
</module> </module>
</if> </if>

3
reactos/boot/freeldr/freeldr/freeldr_arch.rbuild
View file

@ -73,11 +73,8 @@
<directory name="arm"> <directory name="arm">
<if property="ARCH" value="arm"> <if property="ARCH" value="arm">
<file first="true">boot.s</file> <file first="true">boot.s</file>
<file>ferouart.c</file>
<file>loader.c</file> <file>loader.c</file>
<file>macharm.c</file> <file>macharm.c</file>
<file>omapuart.c</file>
<file>versuart.c</file>
</if> </if>
</directory> </directory>

73
reactos/boot/freeldr/freeldr/include/arch/arm/hardware.h
View file

@ -13,41 +13,8 @@
#include "../../reactos/registry.h" #include "../../reactos/registry.h"
#endif #endif
// #include "../../../../../armllb/inc/osloader.h"
// Marvell Feroceon-based SoC: #include "../../../../../armllb/inc/machtype.h"
// Buffalo Linkstation, KuroBox Pro, D-Link DS323 and others
//
#define MACH_TYPE_FEROCEON 526
//
// ARM Versatile PB:
// qemu-system-arm -M versatilepb, RealView Development Boards and others
//
#define MACH_TYPE_VERSATILE_PB 387
//
// TI Beagle Board, OMAP3530 SoC
// qemu-system-arm -M beagle, Beagle Board
//
#define MACH_TYPE_OMAP3_BEAGLE 1546
//
// Compatible boot-loaders should return us this information
//
#define ARM_BOARD_CONFIGURATION_MAJOR_VERSION 1
#define ARM_BOARD_CONFIGURATION_MINOR_VERSION 1
typedef struct _ARM_BOARD_CONFIGURATION_BLOCK
{
ULONG MajorVersion;
ULONG MinorVersion;
ULONG BoardType;
ULONG ClockRate;
ULONG TimerRegisterBase;
ULONG UartRegisterBase;
ULONG MemoryMapEntryCount;
PBIOS_MEMORY_MAP MemoryMap;
CHAR CommandLine[256];
} ARM_BOARD_CONFIGURATION_BLOCK, *PARM_BOARD_CONFIGURATION_BLOCK;
// //
// Static heap for ARC Hardware Component Tree // Static heap for ARC Hardware Component Tree
@ -79,42 +46,6 @@ FldrCreateComponentKey(
OUT PCONFIGURATION_COMPONENT_DATA *ComponentKey OUT PCONFIGURATION_COMPONENT_DATA *ComponentKey
); );
VOID
ArmFeroSerialInit(IN ULONG Baudrate);
VOID
ArmFeroPutChar(IN INT Char);
INT
ArmFeroGetCh(VOID);
BOOLEAN
ArmFeroKbHit(VOID);
VOID
ArmOmap3SerialInit(IN ULONG Baudrate);
VOID
ArmOmap3PutChar(IN INT Char);
INT
ArmOmap3GetCh(VOID);
BOOLEAN
ArmOmap3KbHit(VOID);
VOID
ArmVersaSerialInit(IN ULONG Baudrate);
VOID
ArmVersaPutChar(IN INT Char);
INT
ArmVersaGetCh(VOID);
BOOLEAN
ArmVersaKbHit(VOID);
extern PARM_BOARD_CONFIGURATION_BLOCK ArmBoardBlock; extern PARM_BOARD_CONFIGURATION_BLOCK ArmBoardBlock;
#endif #endif