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[HAL]
- Implement architecture specific HalpSetInterruptGate, replacing SetInterruptGate svn path=/branches/ros-amd64-bringup/; revision=44823
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aebe86c109
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4 changed files with 64 additions and 42 deletions
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@ -46,6 +46,40 @@ HalpUnmapVirtualAddress(IN PVOID VirtualAddress,
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MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
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MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
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}
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}
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VOID
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NTAPI
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HalpInitIdtEntry(PKIDTENTRY64 Idt, PVOID Address)
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{
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Idt->OffsetLow = (ULONG_PTR)Address & 0xffff;
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Idt->OffsetMiddle = ((ULONG_PTR)Address >> 16) & 0xffff;
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Idt->OffsetHigh = (ULONG_PTR)Address >> 32;
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Idt->Selector = KGDT_64_R0_CODE;
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Idt->IstIndex = 0;
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Idt->Type = 0x0e;
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Idt->Dpl = 0;
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Idt->Present = 1;
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Idt->Reserved0 = 0;
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Idt->Reserved1 = 0;
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}
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VOID
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NTAPI
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HalpSetInterruptGate(ULONG Index, PVOID Address)
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{
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ULONG_PTR Flags;
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/* Disable interupts */
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Flags = __readeflags();
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_disable();
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/* Initialize the entry */
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HalpInitIdtEntry(&KeGetPcr()->IdtBase[Index], Address);
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/* Enable interrupts if they were enabled previously */
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__writeeflags(Flags);
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}
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/* FUNCTIONS *****************************************************************/
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/* FUNCTIONS *****************************************************************/
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/*
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/*
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@ -43,6 +43,27 @@ HalpUnmapVirtualAddress(IN PVOID VirtualAddress,
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MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
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MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
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}
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}
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VOID
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NTAPI
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HalpSetInterruptGate(ULONG Index, PVOID address)
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{
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KIDTENTRY *idt;
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KIDT_ACCESS Access;
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/* Set the IDT Access Bits */
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Access.Reserved = 0;
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Access.Present = 1;
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Access.Dpl = 0; /* Kernel-Mode */
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Access.SystemSegmentFlag = 0;
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Access.SegmentType = I386_INTERRUPT_GATE;
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idt = (KIDTENTRY*)((ULONG)KeGetPcr()->IDT + index * sizeof(KIDTENTRY));
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idt->Offset = (USHORT)((ULONG_PTR)address & 0xffff);
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idt->Selector = KGDT_R0_CODE;
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idt->Access = Access.Value;
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idt->ExtendedOffset = (USHORT)((ULONG_PTR)address >> 16);
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}
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/* FUNCTIONS *****************************************************************/
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/* FUNCTIONS *****************************************************************/
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/*
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/*
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@ -103,3 +124,4 @@ KeFlushWriteBuffer(VOID)
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/* Not implemented on x86 */
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/* Not implemented on x86 */
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return;
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return;
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}
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}
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@ -235,6 +235,10 @@ HalpReleaseCmosSpinLock(
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VOID
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VOID
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);
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);
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VOID
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NTAPI
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HalpSetInterruptGate(ULONG Index, PVOID Address);
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#ifdef _M_AMD64
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#ifdef _M_AMD64
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#define KfLowerIrql KeLowerIrql
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#define KfLowerIrql KeLowerIrql
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#ifndef CONFIG_SMP
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#ifndef CONFIG_SMP
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@ -848,44 +848,6 @@ APICCalibrateTimer(ULONG CPU)
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CPUMap[CPU].BusSpeed%1000000);
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CPUMap[CPU].BusSpeed%1000000);
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}
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}
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VOID
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SetInterruptGate(ULONG index, ULONG_PTR address)
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{
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#ifdef _M_AMD64
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KIDTENTRY64 *idt;
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idt = &KeGetPcr()->IdtBase[index];
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idt->OffsetLow = address & 0xffff;
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idt->Selector = KGDT_64_R0_CODE;
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idt->IstIndex = 0;
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idt->Reserved0 = 0;
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idt->Type = 0x0e;
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idt->Dpl = 0;
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idt->Present = 1;
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idt->OffsetMiddle = (address >> 16) & 0xffff;
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idt->OffsetHigh = address >> 32;
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idt->Reserved1 = 0;
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idt->Alignment = 0;
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#else
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KIDTENTRY *idt;
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KIDT_ACCESS Access;
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/* Set the IDT Access Bits */
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Access.Reserved = 0;
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Access.Present = 1;
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Access.Dpl = 0; /* Kernel-Mode */
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Access.SystemSegmentFlag = 0;
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Access.SegmentType = I386_INTERRUPT_GATE;
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idt = (KIDTENTRY*)((ULONG)KeGetPcr()->IDT + index * sizeof(KIDTENTRY));
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idt->Offset = (USHORT)(address & 0xffff);
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idt->Selector = KGDT_R0_CODE;
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idt->Access = Access.Value;
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idt->ExtendedOffset = (USHORT)(address >> 16);
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#endif
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}
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VOID HaliInitBSP(VOID)
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VOID HaliInitBSP(VOID)
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{
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{
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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@ -904,11 +866,11 @@ VOID HaliInitBSP(VOID)
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BSPInitialized = TRUE;
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BSPInitialized = TRUE;
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/* Setup interrupt handlers */
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/* Setup interrupt handlers */
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SetInterruptGate(LOCAL_TIMER_VECTOR, (ULONG_PTR)MpsTimerInterrupt);
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HalpSetInterruptGate(LOCAL_TIMER_VECTOR, MpsTimerInterrupt);
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SetInterruptGate(ERROR_VECTOR, (ULONG_PTR)MpsErrorInterrupt);
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HalpSetInterruptGate(ERROR_VECTOR, MpsErrorInterrupt);
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SetInterruptGate(SPURIOUS_VECTOR, (ULONG_PTR)MpsSpuriousInterrupt);
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HalpSetInterruptGate(SPURIOUS_VECTOR, MpsSpuriousInterrupt);
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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SetInterruptGate(IPI_VECTOR, (ULONG_PTR)MpsIpiInterrupt);
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HalpSetInterruptGate(IPI_VECTOR, MpsIpiInterrupt);
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#endif
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#endif
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DPRINT1("APIC is mapped at 0x%p\n", (PVOID)APICBase);
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DPRINT1("APIC is mapped at 0x%p\n", (PVOID)APICBase);
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