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[HALx86]

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- fix various compiler warnings (msvc)
- fix a bug, where only the last IO map entry would be saved

svn path=/trunk/; revision=54470
This commit is contained in:
Jérôme Gardou 2011-11-21 12:04:16 +00:00
parent 01a74570f0
commit 2a0fd0c988
5 changed files with 18 additions and 17 deletions
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2
reactos/hal/halx86/generic/beep.c
View file

@ -91,7 +91,7 @@ HalMakeBeep(IN ULONG Frequency)
// Next we write the reload value for channel 2
//
__outbyte(TIMER_CHANNEL2_DATA_PORT, Divider & 0xFF);
__outbyte(TIMER_CHANNEL2_DATA_PORT, Divider >> 8);
__outbyte(TIMER_CHANNEL2_DATA_PORT, (Divider >> 8) & 0xFF);
//
// Reconnect the speaker to the timer and re-enable the output pin

5
reactos/hal/halx86/generic/bios.c
View file

@ -394,8 +394,9 @@ HalpStoreAndClearIopm(VOID)
// Save it
//
ASSERT(j < 32);
HalpSavedIoMapData[j][0] = i;
HalpSavedIoMapData[j][0] = (UCHAR)i;
HalpSavedIoMapData[j][1] = *Entry;
j++;
}
//
@ -656,7 +657,7 @@ HalpBiosDisplayReset(VOID)
// invalid op-code handler.
//
IdtPte = HalAddressToPte(((PKIPCR)KeGetPcr())->IDT);
RestoreWriteProtection = IdtPte->Write;
RestoreWriteProtection = IdtPte->Write != 0;
IdtPte->Write = 1;
//

2
reactos/hal/halx86/generic/memory.c
View file

@ -190,7 +190,7 @@ HalpMapPhysicalMemory64(IN PHYSICAL_ADDRESS PhysicalAddress,
{
/* Fill out the PTE */
PointerPte = HalAddressToPte(BaseAddress);
PointerPte->PageFrameNumber = PhysicalAddress.QuadPart >> PAGE_SHIFT;
PointerPte->PageFrameNumber = (ULONG_PTR)PhysicalAddress.QuadPart >> PAGE_SHIFT;
PointerPte->Valid = 1;
PointerPte->Write = 1;

4
reactos/hal/halx86/generic/usage.c
View file

@ -288,7 +288,7 @@ HalpReportResourceUsage(IN PUNICODE_STRING HalName,
{
/* Then register it for internal usage */
HalpIDTUsageFlags[i].Flags = IDT_INTERNAL;
HalpIDTUsage[i].BusReleativeVector = i;
HalpIDTUsage[i].BusReleativeVector = (UCHAR)i;
}
}
@ -499,7 +499,7 @@ HalpRegisterVector(IN UCHAR Flags,
/* Save the vector data */
HalpIDTUsage[SystemVector].Irql = Irql;
HalpIDTUsage[SystemVector].BusReleativeVector = BusVector;
HalpIDTUsage[SystemVector].BusReleativeVector = (UCHAR)BusVector;
}
#ifndef _MINIHAL_

22
reactos/hal/halx86/up/pic.c
View file

@ -678,7 +678,7 @@ KfLowerIrql(IN KIRQL OldIrql)
if (PendingIrql > DISPATCH_LEVEL)
{
/* Set new PIC mask */
Mask.Both = Pcr->IDR;
Mask.Both = Pcr->IDR & 0xFFFF;
__outbyte(PIC1_DATA_PORT, Mask.Master);
__outbyte(PIC2_DATA_PORT, Mask.Slave);
@ -761,7 +761,7 @@ HalpEndSoftwareInterrupt(IN KIRQL OldIrql,
if (PendingIrql > DISPATCH_LEVEL)
{
/* Set new PIC mask */
Mask.Both = Pcr->IDR;
Mask.Both = Pcr->IDR & 0xFFFF;
__outbyte(PIC1_DATA_PORT, Mask.Master);
__outbyte(PIC2_DATA_PORT, Mask.Slave);
@ -815,7 +815,7 @@ _HalpDismissIrqGeneric(IN KIRQL Irql,
if (Irq > 8)
{
/* Send the EOI for the IRQ */
__outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | (Irq - 8));
__outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | ((Irq - 8) & 0xFF));
/* Send the EOI for IRQ2 on the master because this was cascaded */
__outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
@ -823,7 +823,7 @@ _HalpDismissIrqGeneric(IN KIRQL Irql,
else
{
/* Send the EOI for the IRQ */
__outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | Irq);
__outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | (Irq &0xFF));
}
/* Enable interrupts and return success */
@ -835,7 +835,7 @@ _HalpDismissIrqGeneric(IN KIRQL Irql,
Pcr->IRR |= (1 << (Irq + 4));
/* Set new PIC mask to real IRQL level, since the optimization is lost now */
Mask.Both = KiI8259MaskTable[CurrentIrql] | Pcr->IDR;
Mask.Both = (KiI8259MaskTable[CurrentIrql] | Pcr->IDR) & 0xFFFF;
__outbyte(PIC1_DATA_PORT, Mask.Master);
__outbyte(PIC2_DATA_PORT, Mask.Slave);
@ -941,7 +941,7 @@ _HalpDismissIrqLevel(IN KIRQL Irql,
PKPCR Pcr = KeGetPcr();
/* Update the PIC */
Mask.Both = KiI8259MaskTable[Irql] | Pcr->IDR;
Mask.Both = (KiI8259MaskTable[Irql] | Pcr->IDR) & 0xFFFF;
__outbyte(PIC1_DATA_PORT, Mask.Master);
__outbyte(PIC2_DATA_PORT, Mask.Slave);
@ -959,7 +959,7 @@ _HalpDismissIrqLevel(IN KIRQL Irql,
if (Irq > 8)
{
/* Send the EOI for the IRQ */
__outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | (Irq - 8));
__outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | ((Irq - 8) & 0xFF));
/* Send the EOI for IRQ2 on the master because this was cascaded */
__outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
@ -967,7 +967,7 @@ _HalpDismissIrqLevel(IN KIRQL Irql,
else
{
/* Send the EOI for the IRQ */
__outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | Irq);
__outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | (Irq & 0xFF));
}
/* Check if this interrupt should be allowed to happen */
@ -1129,7 +1129,7 @@ HalEnableSystemInterrupt(IN ULONG Vector,
Pcr->IDR &= ~(1 << Irq);
/* Set new PIC mask */
PicMask.Both = KiI8259MaskTable[Pcr->Irql] | Pcr->IDR;
PicMask.Both = (KiI8259MaskTable[Pcr->Irql] | Pcr->IDR) & 0xFFFF;
__outbyte(PIC1_DATA_PORT, PicMask.Master);
__outbyte(PIC2_DATA_PORT, PicMask.Slave);
@ -1219,7 +1219,7 @@ HalEndSystemInterrupt(IN KIRQL OldIrql,
if (PendingIrql > DISPATCH_LEVEL)
{
/* Set new PIC mask */
Mask.Both = Pcr->IDR;
Mask.Both = Pcr->IDR & 0xFFFF;
__outbyte(PIC1_DATA_PORT, Mask.Master);
__outbyte(PIC2_DATA_PORT, Mask.Slave);
@ -1371,7 +1371,7 @@ HalpDispatchInterrupt2(VOID)
if (PendingIrql > DISPATCH_LEVEL)
{
/* Set new PIC mask */
Mask.Both = Pcr->IDR;
Mask.Both = Pcr->IDR & 0xFFFF;
__outbyte(PIC1_DATA_PORT, Mask.Master);
__outbyte(PIC2_DATA_PORT, Mask.Slave);