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[FAST486]

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Implement the MOV instruction for control and debug registers.
Remove definitions for non-existant registers CR1, CR4, CR5, CR6 and CR7.
The standard 80486 doesn't have a CR4 register (although some implementations
of the 80486 had large page support and CR4, it was not reliable).
As for the debug registers, DR4 is the same as DR6, and DR5 is the same as DR7.


svn path=/branches/ntvdm/; revision=60747
This commit is contained in:
Aleksandar Andrejevic 2013-10-26 00:56:11 +00:00
parent 87f5903d48
commit 1525a235a2
4 changed files with 251 additions and 36 deletions
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18
lib/fast486/fast486.c
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@ -217,27 +217,19 @@ Fast486DumpState(PFAST486_STATE State)
State->Flags.Vip ? "VIP" : "vip",
State->Flags.Iopl);
DPRINT1("\nControl Registers:\n"
"CR0 = %08X\tCR1 = %08X\tCR2 = %08X\tCR3 = %08X\n"
"CR4 = %08X\tCR5 = %08X\tCR6 = %08X\tCR7 = %08X\n",
"CR0 = %08X\tCR2 = %08X\tCR3 = %08X\n",
State->ControlRegisters[FAST486_REG_CR0],
State->ControlRegisters[FAST486_REG_CR1],
State->ControlRegisters[FAST486_REG_CR2],
State->ControlRegisters[FAST486_REG_CR3],
State->ControlRegisters[FAST486_REG_CR4],
State->ControlRegisters[FAST486_REG_CR5],
State->ControlRegisters[FAST486_REG_CR6],
State->ControlRegisters[FAST486_REG_CR7]);
State->ControlRegisters[FAST486_REG_CR3]);
DPRINT1("\nDebug Registers:\n"
"DR0 = %08X\tDR1 = %08X\tDR2 = %08X\tDR3 = %08X\n"
"DR4 = %08X\tDR5 = %08X\tDR6 = %08X\tDR7 = %08X\n",
"DR0 = %08X\tDR1 = %08X\tDR2 = %08X\n"
"DR3 = %08X\tDR4 = %08X\tDR5 = %08X\n",
State->DebugRegisters[FAST486_REG_DR0],
State->DebugRegisters[FAST486_REG_DR1],
State->DebugRegisters[FAST486_REG_DR2],
State->DebugRegisters[FAST486_REG_DR3],
State->DebugRegisters[FAST486_REG_DR4],
State->DebugRegisters[FAST486_REG_DR5],
State->DebugRegisters[FAST486_REG_DR6],
State->DebugRegisters[FAST486_REG_DR7]);
State->DebugRegisters[FAST486_REG_DR5]);
}
VOID