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Removed old HAL.

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svn path=/trunk/; revision=2599
This commit is contained in:
Casper Hornstrup 2002-02-04 22:13:02 +00:00
parent 9808ba2cb8
commit 14a6c7e57d
33 changed files with 0 additions and 7200 deletions
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1
reactos/ntoskrnl/hal/.cvsignore
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*.d

1
reactos/ntoskrnl/hal/x86/.cvsignore
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*.d

154
reactos/ntoskrnl/hal/x86/adapter.c
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/* $Id: adapter.c,v 1.7 2001/04/26 01:30:17 phreak Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: hal/x86/adapter.c (from ntoskrnl/io/adapter.c)
* PURPOSE: DMA handling
* PROGRAMMER: David Welch (welch@mcmail.com)
* UPDATE HISTORY:
* Created 22/05/98
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <ddk/iotypes.h>
#include <internal/debug.h>
#include <internal/hal/hal.h>
/* FUNCTIONS *****************************************************************/
/* NOTE: IoAllocateAdapterChannel in NTOSKRNL.EXE */
NTSTATUS STDCALL
HalAllocateAdapterChannel(PADAPTER_OBJECT AdapterObject,
PDEVICE_OBJECT DeviceObject,
ULONG NumberOfMapRegisters,
PDRIVER_CONTROL ExecutionRoutine,
PVOID Context )
{
KIRQL OldIrql;
PVOID Buffer;
int ret;
LARGE_INTEGER MaxAddress;
MaxAddress.QuadPart = 0x1000000;
Buffer = MmAllocateContiguousAlignedMemory( NumberOfMapRegisters * PAGESIZE,
MaxAddress,
0x10000 );
if( !Buffer )
return STATUS_INSUFFICIENT_RESOURCES;
KeAcquireSpinLock( &AdapterObject->SpinLock, &OldIrql );
if( AdapterObject->Inuse )
{
// someone is already using it, we need to wait
// create a wait block, and add it to the chain
UNIMPLEMENTED;
}
else {
AdapterObject->Inuse = TRUE;
KeReleaseSpinLock( &AdapterObject->SpinLock, OldIrql );
ret = ExecutionRoutine( DeviceObject,
NULL,
Buffer,
Context );
KeAcquireSpinLock( &AdapterObject->SpinLock, &OldIrql );
if( ret == DeallocateObject )
{
MmFreeContiguousMemory( Buffer );
AdapterObject->Inuse = FALSE;
}
else AdapterObject->Buffer = Buffer;
}
KeReleaseSpinLock( &AdapterObject->SpinLock, OldIrql );
return STATUS_SUCCESS;
}
BOOLEAN STDCALL
IoFlushAdapterBuffers (PADAPTER_OBJECT AdapterObject,
PMDL Mdl,
PVOID MapRegisterBase,
PVOID CurrentVa,
ULONG Length,
BOOLEAN WriteToDevice)
{
// if this was a read from device, copy data back to caller buffer, otherwise, do nothing
if( !WriteToDevice )
memcpy( (PVOID)((DWORD)MmGetSystemAddressForMdl( Mdl ) + (DWORD)CurrentVa - (DWORD)MmGetMdlVirtualAddress( Mdl )), MapRegisterBase, Length );
return TRUE;
}
VOID STDCALL
IoFreeAdapterChannel (PADAPTER_OBJECT AdapterObject)
{
KIRQL OldIrql;
KeAcquireSpinLock( &AdapterObject->SpinLock, &OldIrql );
if( AdapterObject->Inuse == FALSE )
{
DbgPrint( "Attempting to IoFreeAdapterChannel on a channel not in use\n" );
KeBugCheck(0);
}
AdapterObject->Inuse = FALSE;
if( AdapterObject->Buffer )
{
MmFreeContiguousMemory( AdapterObject->Buffer );
AdapterObject->Buffer = 0;
}
KeReleaseSpinLock( &AdapterObject->SpinLock, OldIrql );
}
VOID STDCALL
IoFreeMapRegisters (PADAPTER_OBJECT AdapterObject,
PVOID MapRegisterBase,
ULONG NumberOfMapRegisters)
{
UNIMPLEMENTED;
}
PHYSICAL_ADDRESS STDCALL
IoMapTransfer (PADAPTER_OBJECT AdapterObject,
PMDL Mdl,
PVOID MapRegisterBase,
PVOID CurrentVa,
PULONG Length,
BOOLEAN WriteToDevice)
{
PHYSICAL_ADDRESS Address;
// program up the dma controller, and return
// if it is a write to the device, copy the caller buffer to the low buffer
if( WriteToDevice )
memcpy( MapRegisterBase,
MmGetSystemAddressForMdl( Mdl ) + ( (DWORD)CurrentVa - (DWORD)MmGetMdlVirtualAddress( Mdl ) ),
*Length );
Address = MmGetPhysicalAddress( MapRegisterBase );
// port 0xA is the dma mask register, or a 0x10 on to the channel number to mask it
WRITE_PORT_UCHAR( (PVOID)0x0A, AdapterObject->Channel | 0x10 );
// write zero to the reset register
WRITE_PORT_UCHAR( (PVOID)0x0C, 0 );
// mode register, or channel with 0x4 for write memory, 0x8 for read memory, 0x10 for non auto initialize
WRITE_PORT_UCHAR( (PVOID)0x0B, AdapterObject->Channel | ( WriteToDevice ? 0x8 : 0x4 ) );
// set the 64k page register for the channel
WRITE_PORT_UCHAR( AdapterObject->PagePort, (UCHAR)(((ULONG)Address.QuadPart)>>16) );
// low, then high address byte, which is always 0 for us, because we have a 64k alligned address
WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
// count is 1 less than length, low then high
WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)(*Length - 1) );
WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)((*Length - 1)>>8) );
// unmask the channel to let it rip
WRITE_PORT_UCHAR( (PVOID)0x0A, AdapterObject->Channel );
Address.QuadPart = (DWORD)MapRegisterBase;
return Address;
}
/* EOF */

77
reactos/ntoskrnl/hal/x86/beep.c
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/*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/beep.c
* PURPOSE: Speaker function (it's only one)
* PROGRAMMER: Eric Kohl (ekohl@abo.rhein-zeitung.de)
* UPDATE HISTORY:
* Created 31/01/99
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#define NDEBUG
#include <internal/debug.h>
/* CONSTANTS *****************************************************************/
#define TIMER2 0x42
#define TIMER3 0x43
#define PORT_B 0x61
#define CLOCKFREQ 1193167
/* FUNCTIONS *****************************************************************/
/*
* FUNCTION: Beeps the speaker.
* ARGUMENTS:
* Frequency = If 0, the speaker will be switched off, otherwise
* the speaker beeps with the specified frequency.
*/
BOOLEAN
STDCALL
HalMakeBeep (
ULONG Frequency
)
{
UCHAR b;
/* save flags and disable interrupts */
__asm__("pushf\n\t" \
"cli\n\t");
/* speaker off */
b = READ_PORT_UCHAR((PUCHAR)PORT_B);
WRITE_PORT_UCHAR((PUCHAR)PORT_B, b & 0xFC);
if (Frequency)
{
DWORD Divider = CLOCKFREQ / Frequency;
if (Divider > 0x10000)
{
/* restore flags */
__asm__("popf\n\t");
return FALSE;
}
/* set timer divider */
WRITE_PORT_UCHAR((PUCHAR)TIMER3, 0xB6);
WRITE_PORT_UCHAR((PUCHAR)TIMER2, (UCHAR)(Divider & 0xFF));
WRITE_PORT_UCHAR((PUCHAR)TIMER2, (UCHAR)((Divider>>8) & 0xFF));
/* speaker on */
WRITE_PORT_UCHAR((PUCHAR)PORT_B, READ_PORT_UCHAR((PUCHAR)PORT_B) | 0x03);
}
/* restore flags */
__asm__("popf\n\t");
return TRUE;
}

144
reactos/ntoskrnl/hal/x86/bios32.c
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/*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/pci
* PURPOSE: Interfaces to BIOS32 interface
* PROGRAMMER: David Welch (welch@mcmail.com)
* UPDATE HISTORY:
* 05/06/98: Created
*/
/*
* NOTES: Sections copied from the Linux pci support
*/
/* INCLUDES ***************************************************************/
#include <ddk/ntddk.h>
#include <internal/mm.h>
#include <internal/i386/segment.h>
/* TYPES ******************************************************************/
typedef struct
{
/*
* "_32_" if present
*/
unsigned int signature;
/*
* Entry point (physical address)
*/
unsigned long int entry;
/*
* Revision level
*/
unsigned char revision;
/*
* Length in paragraphs
*/
unsigned char length;
/*
* Checksum (so all bytes add up to zero)
*/
unsigned char checksum;
unsigned char reserved[5];
} bios32;
BOOLEAN bios32_detected = FALSE;
static struct
{
unsigned long address;
unsigned short segment;
} bios32_indirect = {0,KERNEL_CS};
/* FUNCTIONS **************************************************************/
#define BIOS32_SIGNATURE (('_' << 0)+('3'<<8)+('2'<<16)+('_'<<24))
#if 0
BOOL static checksum(bios32* service_entry)
/*
* FUNCTION: Checks the checksum of a bios32 service entry
* ARGUMENTS:
* service_entry = Pointer to the service entry
* RETURNS: True if the sum of the bytes in the entry was zero
* False otherwise
*/
{
unsigned char* p = (unsigned char *)service_entry;
int i;
unsigned char sum=0;
for (i=0; i<(service_entry->length*16); i++)
{
sum=sum+p[i];
}
// DbgPrint("sum = %d\n",sum);
if (sum==0)
{
return(TRUE);
}
return(FALSE);
}
#endif
BOOLEAN Hal_bios32_is_service_present(ULONG service)
{
unsigned char return_code;
unsigned int address;
unsigned int length;
unsigned int entry;
__asm__("lcall (%%edi)"
: "=a" (return_code),
"=b" (address),
"=c" (length),
"=d" (entry)
: "0" (service),
"1" (0),
"D" (&bios32_indirect));
if (return_code==0)
{
return(address+entry);
}
return(0);
}
VOID Hal_bios32_probe()
/*
* FUNCTION: Probes for an BIOS32 extension
* RETURNS: True if detected
*/
{
DbgPrint ("Hal_bios32_probe()\n");
return;
#if 0
int i;
for (i=0xe0000;i<=0xffff0;i++)
{
bios32* service_entry = (bios32 *)physical_to_linear(i);
if ( service_entry->signature != BIOS32_SIGNATURE )
{
continue;
}
DbgPrint("Signature detected at %x\n",i);
if (!checksum(service_entry))
{
continue;
}
DbgPrint("ReactOS: BIOS32 detected at %x\n",i);
bios32_indirect.address = service_entry->entry;
bios32_detected=TRUE;
}
#endif
}

515
reactos/ntoskrnl/hal/x86/bus.c
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/* $Id: bus.c,v 1.9 2001/08/01 10:39:50 ekohl Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/bus.c
* PURPOSE: Bus functions
* PROGRAMMER: David Welch (welch@mcmail.com)
* UPDATE HISTORY:
* Created 22/05/98
*
*
* TODO:
* - Add bus handler functions for all busses
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/pool.h>
#include <internal/hal/bus.h>
#define NDEBUG
#include <internal/debug.h>
/* GLOBALS *******************************************************************/
#define TAG_BUS TAG('B', 'U', 'S', 'H')
KSPIN_LOCK HalpBusHandlerSpinLock = {0,};
LIST_ENTRY HalpBusHandlerList;
/* FUNCTIONS *****************************************************************/
static NTSTATUS STDCALL
HalpNoAdjustResourceList(PBUS_HANDLER BusHandler,
ULONG BusNumber,
PCM_RESOURCE_LIST Resources)
{
return STATUS_UNSUCCESSFUL;
}
static NTSTATUS STDCALL
HalpNoAssignSlotResources(PBUS_HANDLER BusHandler,
ULONG BusNumber,
PUNICODE_STRING RegistryPath,
PUNICODE_STRING DriverClassName,
PDRIVER_OBJECT DriverObject,
PDEVICE_OBJECT DeviceObject,
ULONG SlotNumber,
PCM_RESOURCE_LIST *AllocatedResources)
{
return STATUS_NOT_SUPPORTED;
}
static ULONG STDCALL
HalpNoBusData(PBUS_HANDLER BusHandler,
ULONG BusNumber,
ULONG SlotNumber,
PVOID Buffer,
ULONG Offset,
ULONG Length)
{
return 0;
}
static ULONG STDCALL
HalpNoGetInterruptVector(PBUS_HANDLER BusHandler,
ULONG BusNumber,
ULONG BusInterruptLevel,
ULONG BusInterruptVector,
PKIRQL Irql,
PKAFFINITY Affinity)
{
return 0;
}
static ULONG STDCALL
HalpNoTranslateBusAddress(PBUS_HANDLER BusHandler,
ULONG BusNumber,
PHYSICAL_ADDRESS BusAddress,
PULONG AddressSpace,
PPHYSICAL_ADDRESS TranslatedAddress)
{
return 0;
}
PBUS_HANDLER
HalpAllocateBusHandler(INTERFACE_TYPE InterfaceType,
BUS_DATA_TYPE BusDataType,
ULONG BusNumber)
{
PBUS_HANDLER BusHandler = NULL;
DPRINT("HalpAllocateBusHandler()\n");
BusHandler = ExAllocatePoolWithTag(NonPagedPool,
sizeof(BUS_HANDLER),
TAG_BUS);
if (BusHandler == NULL)
return NULL;
RtlZeroMemory(BusHandler,
sizeof(BUS_HANDLER));
InsertTailList(&HalpBusHandlerList,
&BusHandler->Entry);
BusHandler->InterfaceType = InterfaceType;
BusHandler->BusDataType = BusDataType;
BusHandler->BusNumber = BusNumber;
/* initialize default bus handler functions */
BusHandler->GetBusData = HalpNoBusData;
BusHandler->SetBusData = HalpNoBusData;
BusHandler->AdjustResourceList = HalpNoAdjustResourceList;
BusHandler->AssignSlotResources = HalpNoAssignSlotResources;
BusHandler->GetInterruptVector = HalpNoGetInterruptVector;
BusHandler->TranslateBusAddress = HalpNoTranslateBusAddress;
/* any more ?? */
DPRINT("HalpAllocateBusHandler() done\n");
return BusHandler;
}
VOID
HalpInitBusHandlers(VOID)
{
PBUS_HANDLER BusHandler;
/* general preparations */
KeInitializeSpinLock(&HalpBusHandlerSpinLock);
InitializeListHead(&HalpBusHandlerList);
/* initialize hal dispatch tables */
#if 0
HalDispatchTable->HalQueryBusSlots = HaliQueryBusSlots;
#endif
/* add system bus handler */
BusHandler = HalpAllocateBusHandler(Internal,
ConfigurationSpaceUndefined,
0);
if (BusHandler == NULL)
return;
BusHandler->GetInterruptVector =
(pGetInterruptVector)HalpGetSystemInterruptVector;
BusHandler->TranslateBusAddress =
(pTranslateBusAddress)HalpTranslateSystemBusAddress;
/* add cmos bus handler */
BusHandler = HalpAllocateBusHandler(InterfaceTypeUndefined,
Cmos,
0);
if (BusHandler == NULL)
return;
BusHandler->GetBusData = (pGetSetBusData)HalpGetCmosData;
BusHandler->SetBusData = (pGetSetBusData)HalpSetCmosData;
/* add isa bus handler */
BusHandler = HalpAllocateBusHandler(Isa,
ConfigurationSpaceUndefined,
0);
if (BusHandler == NULL)
return;
BusHandler->TranslateBusAddress =
(pTranslateBusAddress)HalpTranslateIsaBusAddress;
}
PBUS_HANDLER FASTCALL
HaliHandlerForBus(INTERFACE_TYPE InterfaceType,
ULONG BusNumber)
{
PBUS_HANDLER BusHandler;
PLIST_ENTRY CurrentEntry;
KIRQL OldIrql;
KeAcquireSpinLock(&HalpBusHandlerSpinLock,
&OldIrql);
CurrentEntry = HalpBusHandlerList.Flink;
while (CurrentEntry != &HalpBusHandlerList)
{
BusHandler = (PBUS_HANDLER)CurrentEntry;
if (BusHandler->InterfaceType == InterfaceType &&
BusHandler->BusNumber == BusNumber)
{
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
OldIrql);
return BusHandler;
}
CurrentEntry = CurrentEntry->Flink;
}
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
OldIrql);
return NULL;
}
PBUS_HANDLER FASTCALL
HaliHandlerForConfigSpace(BUS_DATA_TYPE BusDataType,
ULONG BusNumber)
{
PBUS_HANDLER BusHandler;
PLIST_ENTRY CurrentEntry;
KIRQL OldIrql;
KeAcquireSpinLock(&HalpBusHandlerSpinLock,
&OldIrql);
CurrentEntry = HalpBusHandlerList.Flink;
while (CurrentEntry != &HalpBusHandlerList)
{
BusHandler = (PBUS_HANDLER)CurrentEntry;
if (BusHandler->BusDataType == BusDataType &&
BusHandler->BusNumber == BusNumber)
{
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
OldIrql);
return BusHandler;
}
CurrentEntry = CurrentEntry->Flink;
}
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
OldIrql);
return NULL;
}
PBUS_HANDLER FASTCALL
HaliReferenceHandlerForBus(INTERFACE_TYPE InterfaceType,
ULONG BusNumber)
{
PBUS_HANDLER BusHandler;
PLIST_ENTRY CurrentEntry;
KIRQL OldIrql;
KeAcquireSpinLock(&HalpBusHandlerSpinLock,
&OldIrql);
CurrentEntry = HalpBusHandlerList.Flink;
while (CurrentEntry != &HalpBusHandlerList)
{
BusHandler = (PBUS_HANDLER)CurrentEntry;
if (BusHandler->InterfaceType == InterfaceType &&
BusHandler->BusNumber == BusNumber)
{
BusHandler->RefCount++;
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
OldIrql);
return BusHandler;
}
CurrentEntry = CurrentEntry->Flink;
}
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
OldIrql);
return NULL;
}
PBUS_HANDLER FASTCALL
HaliReferenceHandlerForConfigSpace(BUS_DATA_TYPE BusDataType,
ULONG BusNumber)
{
PBUS_HANDLER BusHandler;
PLIST_ENTRY CurrentEntry;
KIRQL OldIrql;
KeAcquireSpinLock(&HalpBusHandlerSpinLock,
&OldIrql);
CurrentEntry = HalpBusHandlerList.Flink;
while (CurrentEntry != &HalpBusHandlerList)
{
BusHandler = (PBUS_HANDLER)CurrentEntry;
if (BusHandler->BusDataType == BusDataType &&
BusHandler->BusNumber == BusNumber)
{
BusHandler->RefCount++;
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
OldIrql);
return BusHandler;
}
CurrentEntry = CurrentEntry->Flink;
}
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
OldIrql);
return NULL;
}
VOID FASTCALL
HaliDereferenceBusHandler(PBUS_HANDLER BusHandler)
{
KIRQL OldIrql;
KeAcquireSpinLock(&HalpBusHandlerSpinLock,
&OldIrql);
BusHandler->RefCount--;
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
OldIrql);
}
NTSTATUS STDCALL
HalAdjustResourceList(PCM_RESOURCE_LIST Resources)
{
PBUS_HANDLER BusHandler;
NTSTATUS Status;
BusHandler = HaliReferenceHandlerForBus(Resources->List[0].InterfaceType,
Resources->List[0].BusNumber);
if (BusHandler == NULL)
return STATUS_SUCCESS;
Status = BusHandler->AdjustResourceList(BusHandler,
Resources->List[0].BusNumber,
Resources);
HaliDereferenceBusHandler (BusHandler);
return Status;
}
NTSTATUS STDCALL
HalAssignSlotResources(PUNICODE_STRING RegistryPath,
PUNICODE_STRING DriverClassName,
PDRIVER_OBJECT DriverObject,
PDEVICE_OBJECT DeviceObject,
INTERFACE_TYPE BusType,
ULONG BusNumber,
ULONG SlotNumber,
PCM_RESOURCE_LIST *AllocatedResources)
{
PBUS_HANDLER BusHandler;
NTSTATUS Status;
BusHandler = HaliReferenceHandlerForBus(BusType,
BusNumber);
if (BusHandler == NULL)
return STATUS_NOT_FOUND;
Status = BusHandler->AssignSlotResources(BusHandler,
BusNumber,
RegistryPath,
DriverClassName,
DriverObject,
DeviceObject,
SlotNumber,
AllocatedResources);
HaliDereferenceBusHandler(BusHandler);
return Status;
}
ULONG STDCALL
HalGetBusData(BUS_DATA_TYPE BusDataType,
ULONG BusNumber,
ULONG SlotNumber,
PVOID Buffer,
ULONG Length)
{
return (HalGetBusDataByOffset(BusDataType,
BusNumber,
SlotNumber,
Buffer,
0,
Length));
}
ULONG STDCALL
HalGetBusDataByOffset(BUS_DATA_TYPE BusDataType,
ULONG BusNumber,
ULONG SlotNumber,
PVOID Buffer,
ULONG Offset,
ULONG Length)
{
PBUS_HANDLER BusHandler;
ULONG Result;
BusHandler = HaliReferenceHandlerForConfigSpace(BusDataType,
BusNumber);
if (BusHandler == NULL)
return 0;
Result = BusHandler->GetBusData(BusHandler,
BusNumber,
SlotNumber,
Buffer,
Offset,
Length);
HaliDereferenceBusHandler (BusHandler);
return Result;
}
ULONG STDCALL
HalGetInterruptVector(INTERFACE_TYPE InterfaceType,
ULONG BusNumber,
ULONG BusInterruptLevel,
ULONG BusInterruptVector,
PKIRQL Irql,
PKAFFINITY Affinity)
{
PBUS_HANDLER BusHandler;
ULONG Result;
BusHandler = HaliReferenceHandlerForBus(InterfaceType,
BusNumber);
if (BusHandler == NULL)
return 0;
Result = BusHandler->GetInterruptVector(BusHandler,
BusNumber,
BusInterruptLevel,
BusInterruptVector,
Irql,
Affinity);
HaliDereferenceBusHandler(BusHandler);
return Result;
}
ULONG STDCALL
HalSetBusData(BUS_DATA_TYPE BusDataType,
ULONG BusNumber,
ULONG SlotNumber,
PVOID Buffer,
ULONG Length)
{
return (HalSetBusDataByOffset(BusDataType,
BusNumber,
SlotNumber,
Buffer,
0,
Length));
}
ULONG STDCALL
HalSetBusDataByOffset(BUS_DATA_TYPE BusDataType,
ULONG BusNumber,
ULONG SlotNumber,
PVOID Buffer,
ULONG Offset,
ULONG Length)
{
PBUS_HANDLER BusHandler;
ULONG Result;
BusHandler = HaliReferenceHandlerForConfigSpace(BusDataType,
BusNumber);
if (BusHandler == NULL)
return 0;
Result = BusHandler->SetBusData(BusHandler,
BusNumber,
SlotNumber,
Buffer,
Offset,
Length);
HaliDereferenceBusHandler(BusHandler);
return Result;
}
BOOLEAN STDCALL
HalTranslateBusAddress(INTERFACE_TYPE InterfaceType,
ULONG BusNumber,
PHYSICAL_ADDRESS BusAddress,
PULONG AddressSpace,
PPHYSICAL_ADDRESS TranslatedAddress)
{
PBUS_HANDLER BusHandler;
BOOLEAN Result;
BusHandler = HaliReferenceHandlerForBus(InterfaceType,
BusNumber);
if (BusHandler == NULL)
return FALSE;
Result = BusHandler->TranslateBusAddress(BusHandler,
BusNumber,
BusAddress,
AddressSpace,
TranslatedAddress);
HaliDereferenceBusHandler(BusHandler);
return Result;
}
/* EOF */

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reactos/ntoskrnl/hal/x86/display.c
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/* $Id: display.c,v 1.15 2001/04/20 12:42:23 chorns Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/display.c
* PURPOSE: Blue screen display
* PROGRAMMER: Eric Kohl (ekohl@abo.rhein-zeitung.de)
* UPDATE HISTORY:
* Created 08/10/99
*/
#include <ddk/ntddk.h>
#include <internal/hal/mps.h>
#define SCREEN_SYNCHRONIZATION
#define CRTC_COMMAND 0x3d4
#define CRTC_DATA 0x3d5
#define CRTC_COLUMNS 0x01
#define CRTC_OVERFLOW 0x07
#define CRTC_ROWS 0x12
#define CRTC_SCANLINES 0x09
#define CRTC_CURHI 0x0e
#define CRTC_CURLO 0x0f
#define CHAR_ATTRIBUTE 0x17 /* grey on blue */
/* VARIABLES ****************************************************************/
static ULONG CursorX = 0; /* Cursor Position */
static ULONG CursorY = 0;
static ULONG SizeX = 80; /* Display size */
static ULONG SizeY = 25;
static BOOLEAN DisplayInitialized = FALSE;
static BOOLEAN HalOwnsDisplay = TRUE;
static WORD *VideoBuffer = NULL;
static PHAL_RESET_DISPLAY_PARAMETERS HalResetDisplayParameters = NULL;
/* STATIC FUNCTIONS *********************************************************/
static VOID
HalClearDisplay (VOID)
{
WORD *ptr = (WORD*)VideoBuffer;
ULONG i;
for (i = 0; i < SizeX * SizeY; i++, ptr++)
*ptr = ((CHAR_ATTRIBUTE << 8) + ' ');
CursorX = 0;
CursorY = 0;
}
VOID
HalScrollDisplay (VOID)
{
WORD *ptr;
int i;
ptr = VideoBuffer + SizeX;
RtlMoveMemory (VideoBuffer,
ptr,
SizeX * (SizeY - 1) * 2);
ptr = VideoBuffer + (SizeX * (SizeY - 1));
for (i = 0; i < SizeX; i++, ptr++)
{
*ptr = (CHAR_ATTRIBUTE << 8) + ' ';
}
}
static VOID
HalPutCharacter (CHAR Character)
{
WORD *ptr;
ptr = VideoBuffer + ((CursorY * SizeX) + CursorX);
*ptr = (CHAR_ATTRIBUTE << 8) + Character;
}
/* PRIVATE FUNCTIONS ********************************************************/
VOID
HalInitializeDisplay (PLOADER_PARAMETER_BLOCK LoaderBlock)
/*
* FUNCTION: Initalize the display
* ARGUMENTS:
* InitParameters = Parameters setup by the boot loader
*/
{
if (DisplayInitialized == FALSE)
{
ULONG ScanLines;
ULONG Data;
VideoBuffer = (WORD *)(0xd0000000 + 0xb8000);
// VideoBuffer = HalMapPhysicalMemory (0xb8000, 2);
/* Set cursor position */
// CursorX = LoaderBlock->cursorx;
// CursorY = LoaderBlock->cursory;
CursorX = 0;
CursorY = 0;
/* read screen size from the crtc */
/* FIXME: screen size should be read from the boot parameters */
WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_COLUMNS);
SizeX = READ_PORT_UCHAR((PUCHAR)CRTC_DATA) + 1;
WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_ROWS);
SizeY = READ_PORT_UCHAR((PUCHAR)CRTC_DATA);
WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_OVERFLOW);
Data = READ_PORT_UCHAR((PUCHAR)CRTC_DATA);
SizeY |= (((Data & 0x02) << 7) | ((Data & 0x40) << 3));
SizeY++;
WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_SCANLINES);
ScanLines = (READ_PORT_UCHAR((PUCHAR)CRTC_DATA) & 0x1F) + 1;
SizeY = SizeY / ScanLines;
#ifdef BOCHS_30ROWS
SizeY=30;
#endif
HalClearDisplay ();
DisplayInitialized = TRUE;
}
}
VOID
HalResetDisplay (VOID)
/*
* FUNCTION: Reset the display
* ARGUMENTS:
* None
*/
{
if (HalResetDisplayParameters == NULL)
return;
if (HalOwnsDisplay == TRUE)
return;
if (HalResetDisplayParameters(SizeX, SizeY) == TRUE)
{
HalOwnsDisplay = TRUE;
HalClearDisplay ();
}
}
/* PUBLIC FUNCTIONS *********************************************************/
VOID
STDCALL
HalAcquireDisplayOwnership (
IN PHAL_RESET_DISPLAY_PARAMETERS ResetDisplayParameters
)
/*
* FUNCTION:
* ARGUMENTS:
* ResetDisplayParameters = Pointer to a driver specific
* reset routine.
*/
{
HalOwnsDisplay = FALSE;
HalResetDisplayParameters = ResetDisplayParameters;
}
VOID STDCALL
HalDisplayString (IN PCH String)
/*
* FUNCTION: Switches the screen to HAL console mode (BSOD) if not there
* already and displays a string
* ARGUMENT:
* string = ASCII string to display
* NOTE: Use with care because there is no support for returning from BSOD
* mode
*/
{
PCH pch;
#ifdef SCREEN_SYNCHRONIZATION
int offset;
#endif
static KSPIN_LOCK Lock;
ULONG Flags;
pch = String;
pushfl(Flags);
__asm__ ("cli\n\t");
KeAcquireSpinLockAtDpcLevel(&Lock);
if (HalOwnsDisplay == FALSE)
{
HalResetDisplay ();
}
#ifdef SCREEN_SYNCHRONIZATION
WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURHI);
offset = READ_PORT_UCHAR((PUCHAR)CRTC_DATA)<<8;
WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURLO);
offset += READ_PORT_UCHAR((PUCHAR)CRTC_DATA);
CursorY = offset / SizeX;
CursorX = offset % SizeX;
#endif
while (*pch != 0)
{
if (*pch == '\n')
{
CursorY++;
CursorX = 0;
}
else
{
HalPutCharacter (*pch);
CursorX++;
if (CursorX >= SizeX)
{
CursorY++;
CursorX = 0;
}
}
if (CursorY >= SizeY)
{
HalScrollDisplay ();
CursorY = SizeY - 1;
}
pch++;
}
#ifdef SCREEN_SYNCHRONIZATION
offset = (CursorY * SizeX) + CursorX;
WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURLO);
WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, offset & 0xff);
WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURHI);
WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, (offset >> 8) & 0xff);
#endif
KeReleaseSpinLockFromDpcLevel(&Lock);
popfl(Flags);
}
VOID
STDCALL
HalQueryDisplayParameters (
PULONG DispSizeX,
PULONG DispSizeY,
PULONG CursorPosX,
PULONG CursorPosY
)
{
if (DispSizeX)
*DispSizeX = SizeX;
if (DispSizeY)
*DispSizeY = SizeY;
if (CursorPosX)
*CursorPosX = CursorX;
if (CursorPosY)
*CursorPosY = CursorY;
}
VOID
STDCALL
HalSetDisplayParameters (
ULONG CursorPosX,
ULONG CursorPosY
)
{
CursorX = (CursorPosX < SizeX) ? CursorPosX : SizeX - 1;
CursorY = (CursorPosY < SizeY) ? CursorPosY : SizeY - 1;
}
/* EOF */

115
reactos/ntoskrnl/hal/x86/dma.c
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@ -1,115 +0,0 @@
/* $Id: dma.c,v 1.11 2001/03/31 16:46:59 jfilby Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/dma.c
* PURPOSE: DMA functions
* PROGRAMMER: David Welch (welch@mcmail.com)
* UPDATE HISTORY:
* Created 22/05/98
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/debug.h>
#include <internal/hal/hal.h>
ADAPTER_OBJECT AdapterObjects[] = {
{ 0, (PVOID)0x87, (PVOID)0x1, (PVOID)0x0, { 0 }, NULL },
{ 1, (PVOID)0x83, (PVOID)0x3, (PVOID)0x2, { 0 }, NULL },
{ 2, (PVOID)0x81, (PVOID)0x5, (PVOID)0x4, { 0 }, NULL },
{ 3, (PVOID)0x82, (PVOID)0x7, (PVOID)0x6, { 0 }, NULL } };
/* FUNCTIONS *****************************************************************/
PVOID STDCALL
HalAllocateCommonBuffer (PADAPTER_OBJECT AdapterObject,
ULONG Length,
PPHYSICAL_ADDRESS LogicalAddress,
BOOLEAN CacheEnabled)
/*
* FUNCTION: Allocates memory that is visible to both the processor(s) and
* a dma device
* ARGUMENTS:
* AdapterObject = Adapter object representing the bus master or
* system dma controller
* Length = Number of bytes to allocate
* LogicalAddress = Logical address the driver can use to access the
* buffer
* CacheEnabled = Specifies if the memory can be cached
* RETURNS: The base virtual address of the memory allocated
* NULL on failure
*/
{
UNIMPLEMENTED;
}
BOOLEAN STDCALL
HalFlushCommonBuffer (ULONG Unknown1,
ULONG Unknown2,
ULONG Unknown3,
ULONG Unknown4,
ULONG Unknown5,
ULONG Unknown6,
ULONG Unknown7,
ULONG Unknown8)
{
return TRUE;
}
VOID STDCALL
HalFreeCommonBuffer (PADAPTER_OBJECT AdapterObject,
ULONG Length,
PHYSICAL_ADDRESS LogicalAddress,
PVOID VirtualAddress,
BOOLEAN CacheEnabled)
{
MmFreeContiguousMemory(VirtualAddress);
}
PADAPTER_OBJECT STDCALL
HalGetAdapter (PDEVICE_DESCRIPTION DeviceDescription,
PULONG NumberOfMapRegisters)
/*
* FUNCTION: Returns a pointer to an adapter object for the DMA device
* defined in the device description structure
* ARGUMENTS:
* DeviceDescription = Structure describing the attributes of the device
* NumberOfMapRegisters (OUT) = Returns the maximum number of map
* registers the device driver can
* allocate for DMA transfer operations
* RETURNS: The allocated adapter object on success
* NULL on failure
*/
{
/* Validate parameters in device description, and return a pointer to
the adapter object for the requested dma channel */
if( DeviceDescription->Version != DEVICE_DESCRIPTION_VERSION )
return NULL;
if( DeviceDescription->Master )
return NULL;
if( DeviceDescription->ScatterGather )
return NULL;
if( DeviceDescription->AutoInitialize )
return NULL;
if( DeviceDescription->Dma32BitAddress )
return NULL;
if( DeviceDescription->InterfaceType != Isa )
return NULL;
/* if( DeviceDescription->DmaWidth != Width8Bits )
return NULL;*/
*NumberOfMapRegisters = 0x10;
AdapterObjects[DeviceDescription->DmaChannel].Buffer = 0;
return &AdapterObjects[DeviceDescription->DmaChannel];
}
ULONG STDCALL
HalReadDmaCounter (PADAPTER_OBJECT AdapterObject)
{
UNIMPLEMENTED;
}
/* EOF */

39
reactos/ntoskrnl/hal/x86/drive.c
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@ -1,39 +0,0 @@
/* $Id: drive.c,v 1.3 2001/06/08 15:08:36 ekohl Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: hal/x86/drive.c
* PURPOSE: Drive letter assignment
* PROGRAMMER:
* UPDATE HISTORY:
* 2000-03-25
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/debug.h>
/* FUNCTIONS *****************************************************************/
VOID STDCALL
IoAssignDriveLetters(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
IN PSTRING NtDeviceName,
OUT PUCHAR NtSystemPath,
OUT PSTRING NtSystemPathString)
{
#ifdef __NTOSKRNL__
HalDispatchTable.HalIoAssignDriveLetters(LoaderBlock,
NtDeviceName,
NtSystemPath,
NtSystemPathString);
#else
HalDispatchTable->HalIoAssignDriveLetters(LoaderBlock,
NtDeviceName,
NtSystemPath,
NtSystemPathString);
#endif
}
/* EOF */

34
reactos/ntoskrnl/hal/x86/enum.c
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@ -1,34 +0,0 @@
/* $Id: enum.c,v 1.2 2001/08/30 20:38:18 dwelch Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/enum.c
* PURPOSE: Motherboard device enumerator
* PROGRAMMER: Casper S. Hornstrup (chorns@users.sourceforge.net)
* UPDATE HISTORY:
* Created 01/05/2001
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <roscfg.h>
#define NDEBUG
#include <internal/debug.h>
VOID
HalpStartEnumerator (VOID)
{
#ifdef ACPI
UNICODE_STRING DriverName;
RtlInitUnicodeString(&DriverName,
L"\\SystemRoot\\system32\\drivers\\acpi.sys");
NtLoadDriver(&DriverName);
#endif /* ACPI */
}
/* EOF */

60
reactos/ntoskrnl/hal/x86/fmutex.c
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@ -1,60 +0,0 @@
/* $Id: fmutex.c,v 1.3 2001/06/20 12:59:18 ekohl Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/fmutex.c
* PURPOSE: Implements fast mutexes
* PROGRAMMER: David Welch (welch@cwcom.net)
* Eric Kohl (ekohl@rz-online.de)
* UPDATE HISTORY:
* Created 09/06/2000
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/debug.h>
/* FUNCTIONS *****************************************************************/
VOID FASTCALL
ExAcquireFastMutex (PFAST_MUTEX FastMutex)
{
KeEnterCriticalRegion();
if (InterlockedDecrement(&(FastMutex->Count))==0)
{
return;
}
FastMutex->Contention++;
KeWaitForSingleObject(&(FastMutex->Event),
Executive,
KernelMode,
FALSE,
NULL);
FastMutex->Owner=KeGetCurrentThread();
}
VOID FASTCALL
ExReleaseFastMutex (PFAST_MUTEX FastMutex)
{
assert(FastMutex->Owner == KeGetCurrentThread());
FastMutex->Owner=NULL;
if (InterlockedIncrement(&(FastMutex->Count))<=0)
{
return;
}
KeSetEvent(&(FastMutex->Event),0,FALSE);
KeLeaveCriticalRegion();
}
BOOLEAN FASTCALL
ExTryToAcquireFastMutex (PFAST_MUTEX FastMutex)
{
UNIMPLEMENTED;
}
/* EOF */

64
reactos/ntoskrnl/hal/x86/halinit.c
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@ -1,64 +0,0 @@
/* $Id: halinit.c,v 1.23 2001/08/30 20:38:18 dwelch Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/halinit.c
* PURPOSE: Initalize the x86 hal
* PROGRAMMER: David Welch (welch@cwcom.net)
* UPDATE HISTORY:
* 11/06/98: Created
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <roscfg.h>
#include <internal/hal/hal.h>
#include <internal/ntoskrnl.h>
#ifdef MP
#include <internal/hal/mps.h>
#endif /* MP */
#define NDEBUG
#include <internal/debug.h>
/* FUNCTIONS ***************************************************************/
BOOLEAN STDCALL
HalInitSystem (ULONG BootPhase,
PLOADER_PARAMETER_BLOCK LoaderBlock)
{
if (BootPhase == 0)
{
HalInitializeDisplay (LoaderBlock);
#ifdef MP
HalpInitMPS();
#else
HalpInitPICs();
/* Setup busy waiting */
HalpCalibrateStallExecution();
#endif /* MP */
}
else if (BootPhase == 1)
{
HalpInitBusHandlers ();
}
else
{
/* Enumerate the devices on the motherboard */
HalpStartEnumerator();
}
return TRUE;
}
/* EOF */

452
reactos/ntoskrnl/hal/x86/irql.c
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@ -1,452 +0,0 @@
/*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/irql.c
* PURPOSE: Implements IRQLs
* PROGRAMMER: David Welch (welch@cwcom.net)
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/bitops.h>
#include <internal/ke.h>
#include <internal/ps.h>
#define NDEBUG
#include <internal/debug.h>
/* GLOBALS ******************************************************************/
/* FIXME: this should be in a header file */
#define NR_IRQS (16)
#define IRQ_BASE (0x40)
/*
* PURPOSE: Current irq level
*/
static KIRQL CurrentIrql = HIGH_LEVEL;
extern ULONG DpcQueueSize;
static VOID KeSetCurrentIrql(KIRQL newlvl);
#define DIRQL_TO_IRQ(x) (PROFILE_LEVEL - x)
#define IRQ_TO_DIRQL(x) (PROFILE_LEVEL - x)
/* FUNCTIONS ****************************************************************/
VOID HalpInitPICs(VOID)
{
/* Initialization sequence */
WRITE_PORT_UCHAR((PUCHAR)0x20, 0x11);
WRITE_PORT_UCHAR((PUCHAR)0xa0, 0x11);
/* Start of hardware irqs (0x24) */
WRITE_PORT_UCHAR((PUCHAR)0x21, 0x40);
WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x48);
/* 8259-1 is master */
WRITE_PORT_UCHAR((PUCHAR)0x21, 0x4);
/* 8259-2 is slave */
WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x2);
/* 8086 mode */
WRITE_PORT_UCHAR((PUCHAR)0x21, 0x1);
WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x1);
/* Mask off all interrupts from PICs */
WRITE_PORT_UCHAR((PUCHAR)0x21, 0xff);
WRITE_PORT_UCHAR((PUCHAR)0xa1, 0xff);
/* We can know enable interrupts */
__asm__ __volatile__ ("sti\n\t");
}
static ULONG
HiSetCurrentPICMask(unsigned int mask)
{
WRITE_PORT_UCHAR((PUCHAR)0x21,mask & 0xff);
WRITE_PORT_UCHAR((PUCHAR)0xa1,(mask >> 8) & 0xff);
return mask;
}
static VOID HiSwitchIrql(KIRQL oldIrql)
/*
* FUNCTION: Switches to the current irql
* NOTE: Must be called with interrupt disabled
*/
{
unsigned int i;
PKTHREAD CurrentThread;
CurrentThread = KeGetCurrentThread();
/*
* Disable all interrupts
*/
if (CurrentIrql >= IPI_LEVEL)
{
HiSetCurrentPICMask(0xFFFF);
__asm__("sti\n\t");
return;
}
/*
* Disable all interrupts but the timer
*/
if (CurrentIrql == PROFILE_LEVEL ||
CurrentIrql == CLOCK1_LEVEL ||
CurrentIrql == CLOCK2_LEVEL)
{
HiSetCurrentPICMask(0xFFFE);
__asm__("sti\n\t");
return;
}
/*
* Disable all interrupts of lesser priority
*/
if (CurrentIrql > DISPATCH_LEVEL)
{
unsigned int current_mask = 0;
for (i = CurrentIrql; i > (PROFILE_LEVEL - 15); i--)
{
current_mask = current_mask | (1 << (PROFILE_LEVEL - i));
}
HiSetCurrentPICMask(current_mask);
__asm__("sti\n\t");
return;
}
/*
* Enable all interrupts
*/
if (CurrentIrql == DISPATCH_LEVEL)
{
HiSetCurrentPICMask(0);
__asm__("sti\n\t");
return;
}
/*
* APCs are disabled but execute any pending DPCs
*/
if (CurrentIrql == APC_LEVEL)
{
HiSetCurrentPICMask(0);
__asm__("sti\n\t");
if (DpcQueueSize > 0)
{
CurrentIrql = DISPATCH_LEVEL;
KiDispatchInterrupt();
CurrentIrql = APC_LEVEL;
}
return;
}
/*
* Execute any pending DPCs or APCs
*/
if (CurrentIrql == PASSIVE_LEVEL)
{
if (DpcQueueSize > 0)
{
CurrentIrql = DISPATCH_LEVEL;
KiDispatchInterrupt();
CurrentIrql = PASSIVE_LEVEL;
}
if (CurrentThread != NULL &&
CurrentThread->ApcState.KernelApcPending)
{
CurrentIrql = APC_LEVEL;
KiDeliverApc(0, 0, 0);
CurrentIrql = PASSIVE_LEVEL;
}
}
}
KIRQL STDCALL
KeGetCurrentIrql (VOID)
/*
* PURPOSE: Returns the current irq level
* RETURNS: The current irq level
*/
{
return(CurrentIrql);
}
STATIC VOID
KeSetCurrentIrql(KIRQL newlvl)
/*
* PURPOSE: Sets the current irq level without taking any action
*/
{
CurrentIrql = newlvl;
}
/**********************************************************************
* NAME EXPORTED
* KfLowerIrql
*
* DESCRIPTION
* Restores the irq level on the current processor
*
* ARGUMENTS
* NewIrql = Irql to lower to
*
* RETURN VALUE
* None
*
* NOTES
* Uses fastcall convention
*/
VOID FASTCALL
KfLowerIrql (KIRQL NewIrql)
{
KIRQL OldIrql;
__asm__("cli\n\t");
DPRINT("KfLowerIrql(NewIrql %d)\n", NewIrql);
if (NewIrql > CurrentIrql)
{
DbgPrint ("(%s:%d) NewIrql %x CurrentIrql %x\n",
__FILE__, __LINE__, NewIrql, CurrentIrql);
KeBugCheck(0);
for(;;);
}
OldIrql = CurrentIrql;
CurrentIrql = NewIrql;
HiSwitchIrql(OldIrql);
}
/**********************************************************************
* NAME EXPORTED
* KeLowerIrql
*
* DESCRIPTION
* Restores the irq level on the current processor
*
* ARGUMENTS
* NewIrql = Irql to lower to
*
* RETURN VALUE
* None
*
* NOTES
*/
VOID STDCALL
KeLowerIrql (KIRQL NewIrql)
{
KfLowerIrql (NewIrql);
}
/**********************************************************************
* NAME EXPORTED
* KfRaiseIrql
*
* DESCRIPTION
* Raises the hardware priority (irql)
*
* ARGUMENTS
* NewIrql = Irql to raise to
*
* RETURN VALUE
* previous irq level
*
* NOTES
* Uses fastcall convention
*/
KIRQL FASTCALL
KfRaiseIrql (KIRQL NewIrql)
{
KIRQL OldIrql;
DPRINT("KfRaiseIrql(NewIrql %d)\n", NewIrql);
if (NewIrql < CurrentIrql)
{
DbgPrint ("%s:%d CurrentIrql %x NewIrql %x\n",
__FILE__,__LINE__,CurrentIrql,NewIrql);
KeBugCheck (0);
for(;;);
}
__asm__("cli\n\t");
OldIrql = CurrentIrql;
CurrentIrql = NewIrql;
DPRINT ("NewIrql %x OldIrql %x CurrentIrql %x\n",
NewIrql, OldIrql, CurrentIrql);
HiSwitchIrql(OldIrql);
return OldIrql;
}
/**********************************************************************
* NAME EXPORTED
* KeRaiseIrql
*
* DESCRIPTION
* Raises the hardware priority (irql)
*
* ARGUMENTS
* NewIrql = Irql to raise to
* OldIrql (OUT) = Caller supplied storage for the previous irql
*
* RETURN VALUE
* None
*
* NOTES
* Calls KfRaiseIrql
*/
VOID STDCALL
KeRaiseIrql (KIRQL NewIrql,
PKIRQL OldIrql)
{
*OldIrql = KfRaiseIrql (NewIrql);
}
/**********************************************************************
* NAME EXPORTED
* KeRaiseIrqlToDpcLevel
*
* DESCRIPTION
* Raises the hardware priority (irql) to DISPATCH level
*
* ARGUMENTS
* None
*
* RETURN VALUE
* Previous irq level
*
* NOTES
* Calls KfRaiseIrql
*/
KIRQL STDCALL
KeRaiseIrqlToDpcLevel (VOID)
{
return KfRaiseIrql (DISPATCH_LEVEL);
}
/**********************************************************************
* NAME EXPORTED
* KeRaiseIrqlToSynchLevel
*
* DESCRIPTION
* Raises the hardware priority (irql) to CLOCK2 level
*
* ARGUMENTS
* None
*
* RETURN VALUE
* Previous irq level
*
* NOTES
* Calls KfRaiseIrql
*/
KIRQL STDCALL
KeRaiseIrqlToSynchLevel (VOID)
{
// return KfRaiseIrql (CLOCK2_LEVEL);
UNIMPLEMENTED;
}
BOOLEAN STDCALL
HalBeginSystemInterrupt (ULONG Vector,
KIRQL Irql,
PKIRQL OldIrql)
{
if (Vector < IRQ_BASE || Vector > IRQ_BASE + NR_IRQS)
return FALSE;
/* Send EOI to the PICs */
WRITE_PORT_UCHAR((PUCHAR)0x20,0x20);
if ((Vector-IRQ_BASE)>=8)
{
WRITE_PORT_UCHAR((PUCHAR)0xa0,0x20);
}
*OldIrql = KeGetCurrentIrql();
if (Vector-IRQ_BASE != 0)
{
DPRINT("old_level %d\n",*OldIrql);
}
KeSetCurrentIrql(Irql);
return TRUE;
}
VOID STDCALL HalEndSystemInterrupt (KIRQL Irql,
ULONG Unknown2)
{
KeSetCurrentIrql(Irql);
}
BOOLEAN STDCALL HalDisableSystemInterrupt (ULONG Vector,
ULONG Unknown2)
{
ULONG irq;
if (Vector < IRQ_BASE || Vector > IRQ_BASE + NR_IRQS)
return FALSE;
irq = Vector - IRQ_BASE;
if (irq < 8)
{
WRITE_PORT_UCHAR((PUCHAR)0x21,
READ_PORT_UCHAR((PUCHAR)0x21)|(1<<irq));
}
else
{
WRITE_PORT_UCHAR((PUCHAR)0xa1,
READ_PORT_UCHAR((PUCHAR)0xa1)|(1<<(irq-8)));
}
return TRUE;
}
BOOLEAN STDCALL HalEnableSystemInterrupt (ULONG Vector,
ULONG Unknown2,
ULONG Unknown3)
{
ULONG irq;
if (Vector < IRQ_BASE || Vector > IRQ_BASE + NR_IRQS)
return FALSE;
irq = Vector - IRQ_BASE;
if (irq < 8)
{
WRITE_PORT_UCHAR((PUCHAR)0x21,
READ_PORT_UCHAR((PUCHAR)0x21)&(~(1<<irq)));
}
else
{
WRITE_PORT_UCHAR((PUCHAR)0xa1,
READ_PORT_UCHAR((PUCHAR)0xa1)&(~(1<<(irq-8))));
}
return TRUE;
}
/* EOF */

62
reactos/ntoskrnl/hal/x86/isa.c
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@ -1,62 +0,0 @@
/* $Id: isa.c,v 1.7 2001/06/13 22:17:01 ekohl Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/isa.c
* PURPOSE: Interfaces to the ISA bus
* PROGRAMMER: David Welch (welch@mcmail.com)
* UPDATE HISTORY:
* 05/06/98: Created
*/
/* INCLUDES ***************************************************************/
#include <ddk/ntddk.h>
#include <internal/hal/bus.h>
/* FUNCTIONS *****************************************************************/
BOOL HalIsaProbe(VOID)
/*
* FUNCTION: Probes for an ISA bus
* RETURNS: True if detected
* NOTE: Since ISA is the default we are called last and always return
* true
*/
{
DbgPrint("Assuming ISA bus\n");
/*
* Probe for plug and play support
*/
return(TRUE);
}
BOOLEAN STDCALL
HalpTranslateIsaBusAddress(PBUS_HANDLER BusHandler,
ULONG BusNumber,
PHYSICAL_ADDRESS BusAddress,
PULONG AddressSpace,
PPHYSICAL_ADDRESS TranslatedAddress)
{
BOOLEAN Result;
Result = HalTranslateBusAddress(PCIBus,
BusNumber,
BusAddress,
AddressSpace,
TranslatedAddress);
if (Result != FALSE)
return Result;
Result = HalTranslateBusAddress(Internal,
BusNumber,
BusAddress,
AddressSpace,
TranslatedAddress);
return Result;
}
/* EOF */

336
reactos/ntoskrnl/hal/x86/kdbg.c
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@ -1,336 +0,0 @@
/* $Id: kdbg.c,v 1.8 2000/03/04 22:01:17 ekohl Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/kdbg.c
* PURPOSE: Serial i/o functions for the kernel debugger.
* PROGRAMMER: Emanuele Aliberti
* Eric Kohl
* UPDATE HISTORY:
* Created 05/09/99
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#define NDEBUG
#include <internal/debug.h>
#define DEFAULT_BAUD_RATE 19200
/* MACROS *******************************************************************/
#define SER_RBR(x) ((x)+0)
#define SER_THR(x) ((x)+0)
#define SER_DLL(x) ((x)+0)
#define SER_IER(x) ((x)+1)
#define SER_DLM(x) ((x)+1)
#define SER_IIR(x) ((x)+2)
#define SER_LCR(x) ((x)+3)
#define SR_LCR_CS5 0x00
#define SR_LCR_CS6 0x01
#define SR_LCR_CS7 0x02
#define SR_LCR_CS8 0x03
#define SR_LCR_ST1 0x00
#define SR_LCR_ST2 0x04
#define SR_LCR_PNO 0x00
#define SR_LCR_POD 0x08
#define SR_LCR_PEV 0x18
#define SR_LCR_PMK 0x28
#define SR_LCR_PSP 0x38
#define SR_LCR_BRK 0x40
#define SR_LCR_DLAB 0x80
#define SER_MCR(x) ((x)+4)
#define SR_MCR_DTR 0x01
#define SR_MCR_RTS 0x02
#define SER_LSR(x) ((x)+5)
#define SR_LSR_DR 0x01
#define SR_LSR_TBE 0x20
#define SER_MSR(x) ((x)+6)
#define SR_MSR_CTS 0x10
#define SR_MSR_DSR 0x20
#define SER_SCR(x) ((x)+7)
/* GLOBAL VARIABLES *********************************************************/
ULONG
__declspec(dllexport)
KdComPortInUse = 0; /* EXPORTED */
/* STATIC VARIABLES *********************************************************/
static ULONG ComPort = 0;
static ULONG BaudRate = 0;
static PUCHAR PortBase = (PUCHAR)0;
/* The com port must only be initialized once! */
static BOOLEAN PortInitialized = FALSE;
/* STATIC FUNCTIONS *********************************************************/
static BOOLEAN
KdpDoesComPortExist (PUCHAR BaseAddress)
{
BOOLEAN found;
BYTE mcr;
BYTE msr;
found = FALSE;
/* save Modem Control Register (MCR) */
mcr = READ_PORT_UCHAR (SER_MCR(BaseAddress));
/* enable loop mode (set Bit 4 of the MCR) */
WRITE_PORT_UCHAR (SER_MCR(BaseAddress), 0x10);
/* clear all modem output bits */
WRITE_PORT_UCHAR (SER_MCR(BaseAddress), 0x10);
/* read the Modem Status Register */
msr = READ_PORT_UCHAR (SER_MSR(BaseAddress));
/*
* the upper nibble of the MSR (modem output bits) must be
* equal to the lower nibble of the MCR (modem input bits)
*/
if ((msr & 0xF0) == 0x00)
{
/* set all modem output bits */
WRITE_PORT_UCHAR (SER_MCR(BaseAddress), 0x1F);
/* read the Modem Status Register */
msr = READ_PORT_UCHAR (SER_MSR(BaseAddress));
/*
* the upper nibble of the MSR (modem output bits) must be
* equal to the lower nibble of the MCR (modem input bits)
*/
if ((msr & 0xF0) == 0xF0)
found = TRUE;
}
/* restore MCR */
WRITE_PORT_UCHAR (SER_MCR(BaseAddress), mcr);
return (found);
}
/* FUNCTIONS ****************************************************************/
/* HAL.KdPortInitialize */
BOOLEAN
STDCALL
KdPortInitialize (
PKD_PORT_INFORMATION PortInformation,
DWORD Unknown1,
DWORD Unknown2
)
{
ULONG BaseArray[5] = {0, 0x3F8, 0x2F8, 0x3E8, 0x2E8};
char buffer[80];
ULONG divisor;
BYTE lcr;
if (PortInitialized == FALSE)
{
if (PortInformation->BaudRate != 0)
{
BaudRate = PortInformation->BaudRate;
}
else
{
BaudRate = DEFAULT_BAUD_RATE;
}
if (PortInformation->ComPort == 0)
{
if (KdpDoesComPortExist ((PUCHAR)BaseArray[2]))
{
PortBase = (PUCHAR)BaseArray[2];
ComPort = 2;
PortInformation->BaseAddress = (ULONG)PortBase;
PortInformation->ComPort = ComPort;
#ifndef NDEBUG
sprintf (buffer,
"\nSerial port COM%ld found at 0x%lx\n",
ComPort,
(ULONG)PortBase);
HalDisplayString (buffer);
#endif /* NDEBUG */
}
else if (KdpDoesComPortExist ((PUCHAR)BaseArray[1]))
{
PortBase = (PUCHAR)BaseArray[1];
ComPort = 1;
PortInformation->BaseAddress = (ULONG)PortBase;
PortInformation->ComPort = ComPort;
#ifndef NDEBUG
sprintf (buffer,
"\nSerial port COM%ld found at 0x%lx\n",
ComPort,
(ULONG)PortBase);
HalDisplayString (buffer);
#endif /* NDEBUG */
}
else
{
sprintf (buffer,
"\nKernel Debugger: No COM port found!!!\n\n");
HalDisplayString (buffer);
return FALSE;
}
}
else
{
if (KdpDoesComPortExist ((PUCHAR)BaseArray[PortInformation->ComPort]))
{
PortBase = (PUCHAR)BaseArray[PortInformation->ComPort];
ComPort = PortInformation->ComPort;
PortInformation->BaseAddress = (ULONG)PortBase;
#ifndef NDEBUG
sprintf (buffer,
"\nSerial port COM%ld found at 0x%lx\n",
ComPort,
(ULONG)PortBase);
HalDisplayString (buffer);
#endif /* NDEBUG */
}
else
{
sprintf (buffer,
"\nKernel Debugger: No serial port found!!!\n\n");
HalDisplayString (buffer);
return FALSE;
}
}
PortInitialized = TRUE;
}
/*
* set baud rate and data format (8N1)
*/
/* turn on DTR and RTS */
WRITE_PORT_UCHAR (SER_MCR(PortBase), SR_MCR_DTR | SR_MCR_RTS);
/* set DLAB */
lcr = READ_PORT_UCHAR (SER_LCR(PortBase)) | SR_LCR_DLAB;
WRITE_PORT_UCHAR (SER_LCR(PortBase), lcr);
/* set baud rate */
divisor = 115200 / BaudRate;
WRITE_PORT_UCHAR (SER_DLL(PortBase), divisor & 0xff);
WRITE_PORT_UCHAR (SER_DLM(PortBase), (divisor >> 8) & 0xff);
/* reset DLAB and set 8N1 format */
WRITE_PORT_UCHAR (SER_LCR(PortBase),
SR_LCR_CS8 | SR_LCR_ST1 | SR_LCR_PNO);
/* read junk out of the RBR */
lcr = READ_PORT_UCHAR (SER_RBR(PortBase));
/*
* set global info
*/
KdComPortInUse = (ULONG)PortBase;
/*
* print message to blue screen
*/
sprintf (buffer,
"\nKernel Debugger: COM%ld (Port 0x%lx) BaudRate %ld\n\n",
ComPort,
(ULONG)PortBase,
BaudRate);
HalDisplayString (buffer);
return TRUE;
}
/* HAL.KdPortGetByte */
BOOLEAN
STDCALL
KdPortGetByte (
PUCHAR ByteRecieved
)
{
if (PortInitialized == FALSE)
return FALSE;
if ((READ_PORT_UCHAR (SER_LSR(PortBase)) & SR_LSR_DR))
{
*ByteRecieved = READ_PORT_UCHAR (SER_RBR(PortBase));
return TRUE;
}
return FALSE;
}
/* HAL.KdPortPollByte */
BOOLEAN
STDCALL
KdPortPollByte (
PUCHAR ByteRecieved
)
{
if (PortInitialized == FALSE)
return FALSE;
while ((READ_PORT_UCHAR (SER_LSR(PortBase)) & SR_LSR_DR) == 0)
;
*ByteRecieved = READ_PORT_UCHAR (SER_RBR(PortBase));
return TRUE;
}
/* HAL.KdPortPutByte */
VOID
STDCALL
KdPortPutByte (
UCHAR ByteToSend
)
{
if (PortInitialized == FALSE)
return;
while ((READ_PORT_UCHAR (SER_LSR(PortBase)) & SR_LSR_TBE) == 0)
;
WRITE_PORT_UCHAR (SER_THR(PortBase), ByteToSend);
}
/* HAL.KdPortRestore */
VOID
STDCALL
KdPortRestore (
VOID
)
{
}
/* HAL.KdPortSave */
VOID
STDCALL
KdPortSave (
VOID
)
{
}
/* EOF */

25
reactos/ntoskrnl/hal/x86/mbr.c
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@ -1,25 +0,0 @@
/*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/mbr.c
* PURPOSE: Functions for reading the master boot record (MBR)
* PROGRAMMER: David Welch (welch@cwcom.net)
* UPDATE HISTORY:
* Created 22/05/98
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/debug.h>
/* FUNCTIONS *****************************************************************/
VOID HalExamineMBR(PDEVICE_OBJECT DeviceObject,
ULONG SectorSize,
ULONG MBRTypeIdentifier,
PVOID Buffer)
{
UNIMPLEMENTED;
}

105
reactos/ntoskrnl/hal/x86/misc.c
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@ -1,105 +0,0 @@
/* $Id: misc.c,v 1.8 2001/03/16 18:11:21 dwelch Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/misc.c
* PURPOSE: Miscellaneous hardware functions
* PROGRAMMER: Eric Kohl (ekohl@rz-online.de)
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/hal/hal.h>
/* FUNCTIONS ****************************************************************/
VOID STDCALL
HalHandleNMI (ULONG Unused)
{
UCHAR ucStatus;
ucStatus = READ_PORT_UCHAR((PUCHAR) 0x61);
HalDisplayString ("\n*** Hardware Malfunction\n\n");
HalDisplayString ("Call your hardware vendor for support\n\n");
if (ucStatus & 0x80)
HalDisplayString ("NMI: Parity Check / Memory Parity Error\n");
if (ucStatus & 0x40)
HalDisplayString ("NMI: Channel Check / IOCHK\n");
HalDisplayString ("\n*** The system has halted ***\n");
KeEnterKernelDebugger ();
}
VOID STDCALL
HalProcessorIdle (VOID)
{
#if 1
__asm__("sti\n\t" \
"hlt\n\t");
#else
#endif
}
VOID STDCALL
HalRequestIpi(ULONG Unknown)
{
return;
}
ULONG FASTCALL
HalSystemVectorDispatchEntry (
ULONG Unknown1,
ULONG Unknown2,
ULONG Unknown3
)
{
return 0;
}
VOID STDCALL
KeFlushWriteBuffer (
VOID
)
{
return;
}
VOID STDCALL
HalReportResourceUsage (
VOID
)
{
/*
* FIXME: Report all resources used by hal.
* Calls IoReportHalResourceUsage()
*/
/*
* Initialize PCI bus.
*/
HalpInitPciBus ();
#if 0
/*
* Initialize IsaPnP bus.
*/
HalpInitIsaPnpBus ();
/*
* Initialize other busses???
*/
/*
* Probe for a BIOS32 extension
*/
Hal_bios32_probe();
#endif
return;
}
/* EOF */

2368
reactos/ntoskrnl/hal/x86/mp.c
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File diff suppressed because it is too large Load diff

76
reactos/ntoskrnl/hal/x86/mps.S
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@ -1,76 +0,0 @@
/* $Id: mps.S,v 1.1 2001/04/13 16:12:25 chorns Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/mps.S
* PURPOSE: Intel MultiProcessor specification support
* PROGRAMMER: Casper S. Hornstrup (chorns@users.sourceforge.net)
* UPDATE HISTORY:
* Created 12/04/2001
*/
/* INCLUDES ******************************************************************/
#include <internal/i386/segment.h>
/* FUNCTIONS *****************************************************************/
#define BEFORE \
pusha; \
pushl %ds; \
pushl %es; \
pushl %fs; \
pushl %gs; \
movl $(KERNEL_DS), %eax; \
movl %eax, %ds; \
movl %eax, %es; \
movl %eax, %gs; \
movl $(PCR_SELECTOR), %eax; \
movl %eax, %fs;
#define AFTER \
popl %gs; \
popl %fs; \
popl %es; \
popl %ds; \
popa;
.globl _MpsTimerInterrupt
_MpsTimerInterrupt:
/* Save registers */
BEFORE
/* Call the C handler */
call _MpsTimerHandler
/* Return to the caller */
AFTER
iret
.globl _MpsErrorInterrupt
_MpsErrorInterrupt:
/* Save registers */
BEFORE
/* Call the C handler */
call _MpsErrorHandler
/* Return to the caller */
AFTER
iret
.globl _MpsSpuriousInterrupt
_MpsSpuriousInterrupt:
/* Save registers */
BEFORE
/* Call the C handler */
call _MpsSpuriousHandler
/* Return to the caller */
AFTER
iret
/* EOF */

106
reactos/ntoskrnl/hal/x86/mpsboot.asm
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@ -1,106 +0,0 @@
;
; COPYRIGHT: See COPYING in the top level directory
; PROJECT: ReactOS kernel
; FILE: ntoskrnl/hal/x86/mpsboot.c
; PURPOSE: Bootstrap code for application processors
; PROGRAMMER: Casper S. Hornstrup (chorns@users.sourceforge.net)
; UPDATE HISTORY:
; Created 12/04/2001
;
;
; Memory map at this stage is:
; 0x2000 Location of our stack
; 0x3000 Startup code for the APs (this code)
;
;
; Base address of common area for BSP and APs
;
LOAD_BASE equ 00200000h
;
; Magic value to be put in EAX when multiboot.S is called as part of the
; application processor initialization process
;
AP_MAGIC equ 12481020h
;
; Segment selectors
;
%define KERNEL_CS (0x8)
%define KERNEL_DS (0x10)
section .text
global _APstart
global _APend
; 16 bit code
BITS 16
_APstart:
cli ; Just in case
xor ax, ax
mov ds, ax
mov ss, ax
mov eax, 3000h + APgdt - _APstart
lgdt [eax]
mov eax, cr0
or eax, 00010001h ; Turn on protected mode and write protection
mov cr0, eax
db 0eah
dw 3000h + flush - _APstart, KERNEL_CS
; 32 bit code
BITS 32
flush:
mov ax, KERNEL_DS
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
; Setup a stack for the AP
mov eax, 2000h
mov eax, [eax]
mov esp, eax
; Jump to start of the kernel with AP magic in eax
mov eax, AP_MAGIC
jmp dword KERNEL_CS:(LOAD_BASE + 0x1000)
; Never get here
; Temporary GDT descriptor for the APs
APgdt:
; Limit
dw (3*8)-1
; Base
dd 3000h + gdt - _APstart
gdt:
dw 0x0 ; Null descriptor
dw 0x0
dw 0x0
dw 0x0
dw 0xffff ; Kernel code descriptor
dw 0x0000
dw 0x9a00
dw 0x00cf
dw 0xffff ; Kernel data descriptor
dw 0x0000
dw 0x9200
dw 0x00cf
_APend:

417
reactos/ntoskrnl/hal/x86/mpsirql.c
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@ -1,417 +0,0 @@
/*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/mpsirql.c
* PURPOSE: Implements IRQLs for multiprocessor systems
* PROGRAMMERS: David Welch (welch@cwcom.net)
* Casper S. Hornstrup (chorns@users.sourceforge.net)
* UPDATE HISTORY:
* 12/04/2001 CSH Created
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/bitops.h>
#include <internal/ke.h>
#include <internal/ps.h>
#include <internal/hal/mps.h>
#define NDEBUG
#include <internal/debug.h>
/* GLOBALS ******************************************************************/
extern ULONG DpcQueueSize;
static VOID KeSetCurrentIrql(KIRQL newlvl);
/* FUNCTIONS ****************************************************************/
#define IRQL2TPR(irql) (APIC_TPR_MIN + ((irql - DISPATCH_LEVEL - 1) * 8))
static VOID HiSetCurrentPriority(
ULONG Priority)
{
//DbgPrint(" P(0x%X)\n", Priority);
APICWrite(APIC_TPR, Priority & APIC_TPR_PRI);
}
static VOID HiSwitchIrql(KIRQL OldIrql, ULONG Flags)
/*
* FUNCTION: Switches to the current irql
* NOTE: Must be called with interrupt disabled
*/
{
PKTHREAD CurrentThread;
KIRQL CurrentIrql;
//DbgPrint("HiSwitchIrql(OldIrql %d)\n", OldIrql);
CurrentIrql = KeGetCurrentKPCR()->Irql;
if (CurrentIrql >= IPI_LEVEL)
{
/* Block all interrupts */
HiSetCurrentPriority(APIC_TPR_MAX);
return;
}
if (CurrentIrql == CLOCK2_LEVEL)
{
HiSetCurrentPriority(APIC_TPR_MAX - 16);
popfl(Flags);
return;
}
if (CurrentIrql > DISPATCH_LEVEL)
{
HiSetCurrentPriority(IRQL2TPR(CurrentIrql));
popfl(Flags);
return;
}
/* Pass all interrupts */
HiSetCurrentPriority(0);
if (CurrentIrql == DISPATCH_LEVEL)
{
popfl(Flags);
return;
}
if (CurrentIrql == APC_LEVEL)
{
if (DpcQueueSize > 0 )
{
KeSetCurrentIrql(DISPATCH_LEVEL);
__asm__("sti\n\t");
KiDispatchInterrupt();
__asm__("cli\n\t");
KeSetCurrentIrql(PASSIVE_LEVEL);
}
popfl(Flags);
return;
}
CurrentThread = KeGetCurrentThread();
if (CurrentIrql == PASSIVE_LEVEL &&
CurrentThread != NULL &&
CurrentThread->ApcState.KernelApcPending)
{
KeSetCurrentIrql(APC_LEVEL);
__asm__("sti\n\t");
KiDeliverApc(0, 0, 0);
__asm__("cli\n\t");
KeSetCurrentIrql(PASSIVE_LEVEL);
popfl(Flags);
}
else
{
popfl(Flags);
}
}
KIRQL STDCALL KeGetCurrentIrql (VOID)
/*
* PURPOSE: Returns the current irq level
* RETURNS: The current irq level
*/
{
return(KeGetCurrentKPCR()->Irql);
}
static VOID KeSetCurrentIrql(KIRQL newlvl)
/*
* PURPOSE: Sets the current irq level without taking any action
*/
{
// DPRINT("KeSetCurrentIrql(newlvl %x)\n",newlvl);
KeGetCurrentKPCR()->Irql = newlvl;
}
/**********************************************************************
* NAME EXPORTED
* KfLowerIrql
*
* DESCRIPTION
* Restores the irq level on the current processor
*
* ARGUMENTS
* NewIrql = Irql to lower to
*
* RETURN VALUE
* None
*
* NOTES
* Uses fastcall convention
*/
VOID FASTCALL
KfLowerIrql (
KIRQL NewIrql
)
{
KIRQL CurrentIrql;
KIRQL OldIrql;
ULONG Flags;
//DbgPrint("KfLowerIrql(NewIrql %d)\n", NewIrql);
pushfl(Flags);
__asm__ ("\n\tcli\n\t");
CurrentIrql = KeGetCurrentKPCR()->Irql;
if (NewIrql > CurrentIrql)
{
DbgPrint ("(%s:%d) NewIrql %x CurrentIrql %x\n",
__FILE__, __LINE__, NewIrql, CurrentIrql);
KeBugCheck(0);
for(;;);
}
OldIrql = CurrentIrql;
KeGetCurrentKPCR()->Irql = NewIrql;
HiSwitchIrql(OldIrql, Flags);
}
/**********************************************************************
* NAME EXPORTED
* KeLowerIrql
*
* DESCRIPTION
* Restores the irq level on the current processor
*
* ARGUMENTS
* NewIrql = Irql to lower to
*
* RETURN VALUE
* None
*
* NOTES
*/
VOID
STDCALL
KeLowerIrql (
KIRQL NewIrql
)
{
KfLowerIrql (NewIrql);
}
/**********************************************************************
* NAME EXPORTED
* KfRaiseIrql
*
* DESCRIPTION
* Raises the hardware priority (irql)
*
* ARGUMENTS
* NewIrql = Irql to raise to
*
* RETURN VALUE
* previous irq level
*
* NOTES
* Uses fastcall convention
*/
KIRQL
FASTCALL
KfRaiseIrql (
KIRQL NewIrql
)
{
KIRQL CurrentIrql;
KIRQL OldIrql;
ULONG Flags;
//DbgPrint("KfRaiseIrql(NewIrql %d)\n", NewIrql);
pushfl(Flags);
__asm__ ("\n\tcli\n\t");
CurrentIrql = KeGetCurrentKPCR()->Irql;
if (NewIrql < CurrentIrql)
{
DbgPrint ("%s:%d CurrentIrql %x NewIrql %x\n",
__FILE__,__LINE__,CurrentIrql,NewIrql);
KeBugCheck (0);
for(;;);
}
OldIrql = CurrentIrql;
KeGetCurrentKPCR()->Irql = NewIrql;
//DPRINT("NewIrql %x OldIrql %x\n", NewIrql, OldIrql);
HiSwitchIrql(OldIrql, Flags);
return OldIrql;
}
/**********************************************************************
* NAME EXPORTED
* KeRaiseIrql
*
* DESCRIPTION
* Raises the hardware priority (irql)
*
* ARGUMENTS
* NewIrql = Irql to raise to
* OldIrql (OUT) = Caller supplied storage for the previous irql
*
* RETURN VALUE
* None
*
* NOTES
* Calls KfRaiseIrql
*/
VOID
STDCALL
KeRaiseIrql (
KIRQL NewIrql,
PKIRQL OldIrql
)
{
*OldIrql = KfRaiseIrql (NewIrql);
}
/**********************************************************************
* NAME EXPORTED
* KeRaiseIrqlToDpcLevel
*
* DESCRIPTION
* Raises the hardware priority (irql) to DISPATCH level
*
* ARGUMENTS
* None
*
* RETURN VALUE
* Previous irq level
*
* NOTES
* Calls KfRaiseIrql
*/
KIRQL
STDCALL
KeRaiseIrqlToDpcLevel (VOID)
{
return KfRaiseIrql (DISPATCH_LEVEL);
}
/**********************************************************************
* NAME EXPORTED
* KeRaiseIrqlToSynchLevel
*
* DESCRIPTION
* Raises the hardware priority (irql) to CLOCK2 level
*
* ARGUMENTS
* None
*
* RETURN VALUE
* Previous irq level
*
* NOTES
* Calls KfRaiseIrql
*/
KIRQL
STDCALL
KeRaiseIrqlToSynchLevel (VOID)
{
return KfRaiseIrql (CLOCK2_LEVEL);
}
BOOLEAN STDCALL HalBeginSystemInterrupt (ULONG Vector,
KIRQL Irql,
PKIRQL OldIrql)
{
DPRINT("Vector (0x%X) Irql (0x%X)\n",
Vector, Irql);
if (Vector < FIRST_DEVICE_VECTOR ||
Vector > FIRST_DEVICE_VECTOR + NUMBER_DEVICE_VECTORS) {
DPRINT("Not a device interrupt\n");
return FALSE;
}
/*
* Acknowledge the interrupt
*/
APICSendEOI();
*OldIrql = KeGetCurrentIrql();
KeSetCurrentIrql(Irql);
return TRUE;
}
VOID STDCALL HalEndSystemInterrupt (KIRQL Irql,
ULONG Unknown2)
{
KeSetCurrentIrql(Irql);
}
BOOLEAN STDCALL HalDisableSystemInterrupt (ULONG Vector,
ULONG Unknown2)
{
ULONG irq;
DPRINT("Vector (0x%X)\n", Vector);
if (Vector < FIRST_DEVICE_VECTOR ||
Vector > FIRST_DEVICE_VECTOR + NUMBER_DEVICE_VECTORS) {
DPRINT("Not a device interrupt\n");
return FALSE;
}
irq = VECTOR2IRQ(Vector);
IOAPICMaskIrq(0, irq);
return TRUE;
}
BOOLEAN STDCALL HalEnableSystemInterrupt (ULONG Vector,
ULONG Unknown2,
ULONG Unknown3)
{
ULONG irq;
DPRINT("Vector (0x%X)\n", Vector);
if (Vector < FIRST_DEVICE_VECTOR ||
Vector > FIRST_DEVICE_VECTOR + NUMBER_DEVICE_VECTORS) {
DPRINT("Not a device interrupt\n");
return FALSE;
}
irq = VECTOR2IRQ(Vector);
IOAPICUnmaskIrq(0, irq);
return TRUE;
}
/* EOF */

84
reactos/ntoskrnl/hal/x86/parttab.c
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@ -1,84 +0,0 @@
/* $Id: parttab.c,v 1.4 2001/06/08 15:08:36 ekohl Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/parttab.c (was ntoskrnl/io/fdisk.c)
* PURPOSE: Handling fixed disks (partition table functions)
* PROGRAMMER: David Welch (welch@mcmail.com)
* UPDATE HISTORY:
* Created 22/05/98
* 2000-03-25 (ea)
* Moved here from ntoskrnl/io/fdisk.c
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/debug.h>
/* FUNCTIONS *****************************************************************/
NTSTATUS STDCALL
IoReadPartitionTable(PDEVICE_OBJECT DeviceObject,
ULONG SectorSize,
BOOLEAN ReturnRecognizedPartitions,
PDRIVE_LAYOUT_INFORMATION *PartitionBuffer)
{
#ifdef __NTOSKRNL__
return HalDispatchTable.HalIoReadPartitionTable(DeviceObject,
SectorSize,
ReturnRecognizedPartitions,
PartitionBuffer);
#else
return HalDispatchTable->HalIoReadPartitionTable(DeviceObject,
SectorSize,
ReturnRecognizedPartitions,
PartitionBuffer);
#endif
}
NTSTATUS STDCALL
IoSetPartitionInformation(PDEVICE_OBJECT DeviceObject,
ULONG SectorSize,
ULONG PartitionNumber,
ULONG PartitionType)
{
#ifdef __NTOSKRNL__
return HalDispatchTable.HalIoSetPartitionInformation(DeviceObject,
SectorSize,
PartitionNumber,
PartitionType);
#else
return HalDispatchTable->HalIoSetPartitionInformation(DeviceObject,
SectorSize,
PartitionNumber,
PartitionType);
#endif
}
NTSTATUS STDCALL
IoWritePartitionTable(PDEVICE_OBJECT DeviceObject,
ULONG SectorSize,
ULONG SectorsPerTrack,
ULONG NumberOfHeads,
PDRIVE_LAYOUT_INFORMATION PartitionBuffer)
{
#ifdef __NTOSKRNL__
return HalDispatchTable.HalIoWritePartitionTable(DeviceObject,
SectorSize,
SectorsPerTrack,
NumberOfHeads,
PartitionBuffer);
#else
return HalDispatchTable->HalIoWritePartitionTable(DeviceObject,
SectorSize,
SectorsPerTrack,
NumberOfHeads,
PartitionBuffer);
#endif
}
/* EOF */

494
reactos/ntoskrnl/hal/x86/pci.c
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@ -1,494 +0,0 @@
/* $Id: pci.c,v 1.7 2001/06/13 22:17:01 ekohl Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/pci.c
* PURPOSE: Interfaces to the PCI bus
* PROGRAMMER: David Welch (welch@mcmail.com)
* Eric Kohl (ekohl@rz-online.de)
* UPDATE HISTORY:
* 05/06/1998: Created
* 17/08/2000: Added preliminary pci bus scanner
* 13/06/2001: Implemented access to pci configuration space
*/
/*
* NOTES: Sections copied from the Linux pci support
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/hal/bus.h>
#define NDEBUG
#include <internal/debug.h>
/* MACROS ******************************************************************/
/* access type 1 macros */
#define PCI_FUNC(devfn) \
((devfn) & 0x07)
#define CONFIG_CMD(bus, device_fn, where) \
(0x80000000 | (bus << 16) | (device_fn << 8) | (where & ~3))
/* access type 2 macros */
#define IOADDR(devfn, where) \
((0xC000 | ((devfn & 0x78) << 5)) + where)
#define FUNC(devfn) \
(((devfn & 7) << 1) | 0xf0)
#define PCIBIOS_SUCCESSFUL 0x00
#define PCIBIOS_DEVICE_NOT_FOUND 0x86
#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
/* GLOBALS ******************************************************************/
static ULONG BusConfigType = 0; /* undetermined config type */
/* FUNCTIONS ****************************************************************/
static NTSTATUS
ReadPciConfigUchar(UCHAR Bus,
UCHAR Slot,
UCHAR Offset,
PUCHAR Value)
{
switch (BusConfigType)
{
case 1:
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
*Value = READ_PORT_UCHAR((PUCHAR)0xCFC + (Offset & 3));
return STATUS_SUCCESS;
case 2:
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
*Value = READ_PORT_UCHAR((PUCHAR)(IOADDR(Slot, Offset)));
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
return STATUS_SUCCESS;
}
return STATUS_UNSUCCESSFUL;
}
static NTSTATUS
ReadPciConfigUshort(UCHAR Bus,
UCHAR Slot,
UCHAR Offset,
PUSHORT Value)
{
if ((Offset & 1) != 0)
{
return PCIBIOS_BAD_REGISTER_NUMBER;
}
switch (BusConfigType)
{
case 1:
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
*Value = READ_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1));
return STATUS_SUCCESS;
case 2:
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
*Value = READ_PORT_USHORT((PUSHORT)(IOADDR(Slot, Offset)));
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
return STATUS_SUCCESS;
}
return STATUS_UNSUCCESSFUL;
}
static NTSTATUS
ReadPciConfigUlong(UCHAR Bus,
UCHAR Slot,
UCHAR Offset,
PULONG Value)
{
if ((Offset & 3) != 0)
{
return PCIBIOS_BAD_REGISTER_NUMBER;
}
switch (BusConfigType)
{
case 1:
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
*Value = READ_PORT_ULONG((PULONG)0xCFC);
return STATUS_SUCCESS;
case 2:
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
*Value = READ_PORT_ULONG((PULONG)(IOADDR(Slot, Offset)));
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
return STATUS_SUCCESS;
}
return STATUS_UNSUCCESSFUL;
}
static NTSTATUS
WritePciConfigUchar(UCHAR Bus,
UCHAR Slot,
UCHAR Offset,
UCHAR Value)
{
switch (BusConfigType)
{
case 1:
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
WRITE_PORT_UCHAR((PUCHAR)0xCFC + (Offset&3), Value);
return STATUS_SUCCESS;
case 2:
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
WRITE_PORT_UCHAR((PUCHAR)(IOADDR(Slot,Offset)), Value);
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
return STATUS_SUCCESS;
}
return STATUS_UNSUCCESSFUL;
}
static NTSTATUS
WritePciConfigUshort(UCHAR Bus,
UCHAR Slot,
UCHAR Offset,
USHORT Value)
{
if ((Offset & 1) != 0)
{
return PCIBIOS_BAD_REGISTER_NUMBER;
}
switch (BusConfigType)
{
case 1:
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
WRITE_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1), Value);
return STATUS_SUCCESS;
case 2:
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
WRITE_PORT_USHORT((PUSHORT)(IOADDR(Slot, Offset)), Value);
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
return STATUS_SUCCESS;
}
return STATUS_UNSUCCESSFUL;
}
static NTSTATUS
WritePciConfigUlong(UCHAR Bus,
UCHAR Slot,
UCHAR Offset,
ULONG Value)
{
if ((Offset & 3) != 0)
{
return PCIBIOS_BAD_REGISTER_NUMBER;
}
switch (BusConfigType)
{
case 1:
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
WRITE_PORT_ULONG((PULONG)0xCFC, Value);
return STATUS_SUCCESS;
case 2:
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
WRITE_PORT_ULONG((PULONG)(IOADDR(Slot, Offset)), Value);
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
return STATUS_SUCCESS;
}
return STATUS_UNSUCCESSFUL;
}
static ULONG STDCALL
HalpGetPciData(PBUS_HANDLER BusHandler,
ULONG BusNumber,
ULONG SlotNumber,
PVOID Buffer,
ULONG Offset,
ULONG Length)
{
PVOID Ptr = Buffer;
ULONG Address = Offset;
ULONG Len = Length;
ULONG Vendor;
UCHAR HeaderType;
DPRINT("HalpGetPciData() called.\n");
DPRINT(" BusNumber %lu\n", BusNumber);
DPRINT(" SlotNumber %lu\n", SlotNumber);
DPRINT(" Offset 0x%lx\n", Offset);
DPRINT(" Length 0x%lx\n", Length);
if ((Length == 0) || (BusConfigType == 0))
return 0;
/* 0E=PCI_HEADER_TYPE */
ReadPciConfigUchar(BusNumber,
SlotNumber & 0xF8,
0x0E,
&HeaderType);
if (((HeaderType & 0x80) == 0) && ((SlotNumber & 0x07) != 0))
return 0;
ReadPciConfigUlong(BusNumber,
SlotNumber,
0x00,
&Vendor);
/* some broken boards return 0 if a slot is empty: */
if (Vendor == 0xFFFFFFFF || Vendor == 0)
return 0;
if ((Address & 1) && (Len >= 1))
{
ReadPciConfigUchar(BusNumber,
SlotNumber,
Address,
Ptr);
Ptr = Ptr + 1;
Address++;
Len--;
}
if ((Address & 2) && (Len >= 2))
{
ReadPciConfigUshort(BusNumber,
SlotNumber,
Address,
Ptr);
Ptr = Ptr + 2;
Address += 2;
Len -= 2;
}
while (Len >= 4)
{
ReadPciConfigUlong(BusNumber,
SlotNumber,
Address,
Ptr);
Ptr = Ptr + 4;
Address += 4;
Len -= 4;
}
if (Len >= 2)
{
ReadPciConfigUshort(BusNumber,
SlotNumber,
Address,
Ptr);
Ptr = Ptr + 2;
Address += 2;
Len -= 2;
}
if (Len >= 1)
{
ReadPciConfigUchar(BusNumber,
SlotNumber,
Address,
Ptr);
Ptr = Ptr + 1;
Address++;
Len--;
}
return Length - Len;
}
static ULONG STDCALL
HalpSetPciData(PBUS_HANDLER BusHandler,
ULONG BusNumber,
ULONG SlotNumber,
PVOID Buffer,
ULONG Offset,
ULONG Length)
{
PVOID Ptr = Buffer;
ULONG Address = Offset;
ULONG Len = Length;
ULONG Vendor;
UCHAR HeaderType;
DPRINT("HalpSetPciData() called.\n");
DPRINT(" BusNumber %lu\n", BusNumber);
DPRINT(" SlotNumber %lu\n", SlotNumber);
DPRINT(" Offset 0x%lx\n", Offset);
DPRINT(" Length 0x%lx\n", Length);
if ((Length == 0) || (BusConfigType == 0))
return 0;
/* 0E=PCI_HEADER_TYPE */
ReadPciConfigUchar(BusNumber,
SlotNumber & 0xF8,
0x0E,
&HeaderType);
if (((HeaderType & 0x80) == 0) && ((SlotNumber & 0x07) != 0))
return 0;
ReadPciConfigUlong(BusNumber,
SlotNumber,
0x00,
&Vendor);
/* some broken boards return 0 if a slot is empty: */
if (Vendor == 0xFFFFFFFF || Vendor == 0)
return 0;
if ((Address & 1) && (Len >= 1))
{
WritePciConfigUchar(BusNumber,
SlotNumber,
Address,
*(PUCHAR)Ptr);
Ptr = Ptr + 1;
Address++;
Len--;
}
if ((Address & 2) && (Len >= 2))
{
WritePciConfigUshort(BusNumber,
SlotNumber,
Address,
*(PUSHORT)Ptr);
Ptr = Ptr + 2;
Address += 2;
Len -= 2;
}
while (Len >= 4)
{
WritePciConfigUlong(BusNumber,
SlotNumber,
Address,
*(PULONG)Ptr);
Ptr = Ptr + 4;
Address += 4;
Len -= 4;
}
if (Len >= 2)
{
WritePciConfigUshort(BusNumber,
SlotNumber,
Address,
*(PUSHORT)Ptr);
Ptr = Ptr + 2;
Address += 2;
Len -= 2;
}
if (Len >= 1)
{
WritePciConfigUchar(BusNumber,
SlotNumber,
Address,
*(PUCHAR)Ptr);
Ptr = Ptr + 1;
Address++;
Len--;
}
return Length - Len;
}
static ULONG
GetBusConfigType(VOID)
{
ULONG Value;
DPRINT("GetBusConfigType() called\n");
DPRINT("Checking configuration type 1:");
WRITE_PORT_UCHAR((PUCHAR)0xCFB, 0x01);
Value = READ_PORT_ULONG((PULONG)0xCF8);
WRITE_PORT_ULONG((PULONG)0xCF8, 0x80000000);
if (READ_PORT_ULONG((PULONG)0xCF8) == 0x80000000)
{
WRITE_PORT_ULONG((PULONG)0xCF8, Value);
DPRINT(" Success!\n");
return 1;
}
WRITE_PORT_ULONG((PULONG)0xCF8, Value);
DPRINT(" Unsuccessful!\n");
DPRINT("Checking configuration type 2:");
WRITE_PORT_UCHAR((PUCHAR)0xCFB, 0x00);
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0x00);
WRITE_PORT_UCHAR((PUCHAR)0xCFA, 0x00);
if (READ_PORT_UCHAR((PUCHAR)0xCF8) == 0x00 &&
READ_PORT_UCHAR((PUCHAR)0xCFB) == 0x00)
{
DPRINT(" Success!\n");
return 2;
}
DPRINT(" Unsuccessful!\n");
DPRINT("No pci bus found!\n");
return 0;
}
VOID HalpInitPciBus (VOID)
{
PBUS_HANDLER BusHandler;
DPRINT("HalpInitPciBus() called.\n");
BusConfigType = GetBusConfigType();
if (BusConfigType == 0)
return;
DPRINT("Bus configuration %lu used\n", BusConfigType);
/* pci bus (bus 0) handler */
BusHandler = HalpAllocateBusHandler(PCIBus,
PCIConfiguration,
0);
BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
// BusHandler->GetInterruptVector =
// (pGetInterruptVector)HalpGetPciInterruptVector;
// BusHandler->AdjustResourceList =
// (pGetSetBusData)HalpAdjustPciResourceList;
// BusHandler->AssignSlotResources =
// (pGetSetBusData)HalpAssignPciSlotResources;
/* agp bus (bus 1) handler */
BusHandler = HalpAllocateBusHandler(PCIBus,
PCIConfiguration,
1);
BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
// BusHandler->GetInterruptVector =
// (pGetInterruptVector)HalpGetPciInterruptVector;
// BusHandler->AdjustResourceList =
// (pGetSetBusData)HalpAdjustPciResourceList;
// BusHandler->AssignSlotResources =
// (pGetSetBusData)HalpAssignPciSlotResources;
DPRINT("HalpInitPciBus() finished.\n");
}
/* EOF */

56
reactos/ntoskrnl/hal/x86/perfcnt.c
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@ -1,56 +0,0 @@
/* $Id: perfcnt.c,v 1.2 2001/01/14 15:36:55 ekohl Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/perfcnt.c
* PURPOSE: Performance counter functions
* PROGRAMMER: David Welch (welch@mcmail.com)
* Eric Kohl (ekohl@rz-online.de)
* UPDATE HISTORY:
* 09/06/2000: Created
*/
/* INCLUDES ***************************************************************/
#include <ddk/ntddk.h>
/* FUNCTIONS **************************************************************/
VOID STDCALL
HalCalibratePerformanceCounter(ULONG Count)
{
ULONG i;
/* save flags and disable interrupts */
__asm__("pushf\n\t" \
"cli\n\t");
for (i = 0; i < Count; i++);
/* restore flags */
__asm__("popf\n\t");
}
LARGE_INTEGER STDCALL
KeQueryPerformanceCounter(PLARGE_INTEGER PerformanceFreq)
/*
* FUNCTION: Queries the finest grained running count avaiable in the system
* ARGUMENTS:
* PerformanceFreq (OUT) = The routine stores the number of
* performance counters tick per second here
* RETURNS: The performance counter value in HERTZ
* NOTE: Returns the system tick count or the time-stamp on the pentium
*/
{
if (PerformanceFreq != NULL)
{
PerformanceFreq->QuadPart = 0;
}
return *PerformanceFreq;
}
/* EOF */

182
reactos/ntoskrnl/hal/x86/portio.c
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@ -1,182 +0,0 @@
/* $Id: portio.c,v 1.5 2000/10/08 23:44:45 dwelch Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/portio.c
* PURPOSE: Port I/O functions
* PROGRAMMER: Eric Kohl (ekohl@abo.rhein-zeitung.de)
* UPDATE HISTORY:
* Created 18/10/99
*/
#include <ddk/ntddk.h>
/* FUNCTIONS ****************************************************************/
/*
* This file contains the definitions for the x86 IO instructions
* inb/inw/inl/outb/outw/outl and the "string versions" of the same
* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
* versions of the single-IO instructions (inb_p/inw_p/..).
*
* This file is not meant to be obfuscating: it's just complicated
* to (a) handle it all in a way that makes gcc able to optimize it
* as well as possible and (b) trying to avoid writing the same thing
* over and over again with slight variations and possibly making a
* mistake somewhere.
*/
/*
* Thanks to James van Artsdalen for a better timing-fix than
* the two short jumps: using outb's to a nonexistent port seems
* to guarantee better timings even on fast machines.
*
* On the other hand, I'd like to be sure of a non-existent port:
* I feel a bit unsafe about using 0x80 (should be safe, though)
*
* Linus
*/
#ifdef SLOW_IO_BY_JUMPING
#define __SLOW_DOWN_IO __asm__ __volatile__("jmp 1f\n1:\tjmp 1f\n1:")
#else
#define __SLOW_DOWN_IO __asm__ __volatile__("outb %al,$0x80")
#endif
#ifdef REALLY_SLOW_IO
#define SLOW_DOWN_IO { __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; }
#else
#define SLOW_DOWN_IO __SLOW_DOWN_IO
#endif
VOID STDCALL
READ_PORT_BUFFER_UCHAR (PUCHAR Port,
PUCHAR Buffer,
ULONG Count)
{
__asm__ __volatile__ ("cld ; rep ; insb\n\t"
: "=D" (Buffer), "=c" (Count)
: "d" (Port),"0" (Buffer),"1" (Count));
}
VOID STDCALL
READ_PORT_BUFFER_USHORT (PUSHORT Port,
PUSHORT Buffer,
ULONG Count)
{
__asm__ __volatile__ ("cld ; rep ; insw"
: "=D" (Buffer), "=c" (Count)
: "d" (Port),"0" (Buffer),"1" (Count));
}
VOID STDCALL
READ_PORT_BUFFER_ULONG (PULONG Port,
PULONG Buffer,
ULONG Count)
{
__asm__ __volatile__ ("cld ; rep ; insl"
: "=D" (Buffer), "=c" (Count)
: "d" (Port),"0" (Buffer),"1" (Count));
}
UCHAR STDCALL
READ_PORT_UCHAR (PUCHAR Port)
{
UCHAR Value;
__asm__("inb %w1, %0\n\t"
: "=a" (Value)
: "d" (Port));
SLOW_DOWN_IO;
return(Value);
}
USHORT STDCALL
READ_PORT_USHORT (PUSHORT Port)
{
USHORT Value;
__asm__("inw %w1, %0\n\t"
: "=a" (Value)
: "d" (Port));
SLOW_DOWN_IO;
return(Value);
}
ULONG STDCALL
READ_PORT_ULONG (PULONG Port)
{
ULONG Value;
__asm__("inl %w1, %0\n\t"
: "=a" (Value)
: "d" (Port));
SLOW_DOWN_IO;
return(Value);
}
VOID STDCALL
WRITE_PORT_BUFFER_UCHAR (PUCHAR Port,
PUCHAR Buffer,
ULONG Count)
{
__asm__ __volatile__ ("cld ; rep ; outsb"
: "=S" (Buffer), "=c" (Count)
: "d" (Port),"0" (Buffer),"1" (Count));
}
VOID STDCALL
WRITE_PORT_BUFFER_USHORT (PUSHORT Port,
PUSHORT Buffer,
ULONG Count)
{
__asm__ __volatile__ ("cld ; rep ; outsw"
: "=S" (Buffer), "=c" (Count)
: "d" (Port),"0" (Buffer),"1" (Count));
}
VOID STDCALL
WRITE_PORT_BUFFER_ULONG (PULONG Port,
PULONG Buffer,
ULONG Count)
{
__asm__ __volatile__ ("cld ; rep ; outsl"
: "=S" (Buffer), "=c" (Count)
: "d" (Port),"0" (Buffer),"1" (Count));
}
VOID STDCALL
WRITE_PORT_UCHAR (PUCHAR Port,
UCHAR Value)
{
__asm__("outb %0, %w1\n\t"
:
: "a" (Value),
"d" (Port));
SLOW_DOWN_IO;
}
VOID STDCALL
WRITE_PORT_USHORT (PUSHORT Port,
USHORT Value)
{
__asm__("outw %0, %w1\n\t"
:
: "a" (Value),
"d" (Port));
SLOW_DOWN_IO;
}
VOID STDCALL
WRITE_PORT_ULONG (PULONG Port,
ULONG Value)
{
__asm__("outl %0, %w1\n\t"
:
: "a" (Value),
"d" (Port));
SLOW_DOWN_IO;
}
/* EOF */

114
reactos/ntoskrnl/hal/x86/pwroff.c
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@ -1,114 +0,0 @@
/* $Id: pwroff.c,v 1.1 2000/03/26 19:38:19 ea Exp $
*
* FILE : reactos/hal/x86/apm.c
* DESCRIPTION: Turn CPU off...
* PROJECT : ReactOS Operating System
* AUTHOR : D. Lindauer (July 11 1997)
* NOTE : This program is public domain
* REVISIONS :
* 1999-12-26
*/
#define APM_FUNCTION_AVAILABLE 0x5300
#define APM_FUNCTION_CONNREAL 0x5301
#define APM_FUNCTION_POWEROFF 0x5307
#define APM_FUNCTION_ENABLECPU 0x530d
#define APM_FUNCTION_ENABLEAPM 0x530e
#define APM_DEVICE_BIOS 0
#define APM_DEVICE_ALL 1
#define APM_MODE_DISABLE 0
#define APM_MODE_ENABLE 1
nopm db 'No power management functionality',10,13,'$'
errmsg db 'Power management error',10,13,'$'
wrongver db 'Need APM version 1.1 or better',10,13,'$'
;
; Entry point
;
go:
mov dx,offset nopm
jc error
cmp ax,101h ; See if version 1.1 or greater
mov dx,offset wrongver
jc error
mov [ver],ax
mov ax,5301h ; Do a real mode connection
mov bx,0 ; device = BIOS
int 15h
jnc noconerr
cmp ah,2 ; Pass if already connected
mov dx,offset errmsg ; else error
jnz error
noconerr:
mov ax,530eh ; Enable latest version of APM
mov bx,0 ; device = BIOS
mov cx,[ver] ; version
int 15h
mov dx,offset errmsg
jc error
mov ax,530dh ; Now engage and enable CPU management
mov bx,1 ; device = all
mov cx,1 ; enable
int 15h
mov dx,offset errmsg
jc error
mov ax,530fh
mov bx,1 ; device = ALL
mov cx,1 ; enable
int 15h
mov dx,offset errmsg
jc error
mov dx,offset errmsg
error:
call print
mov ax,4c01h
int 21h
int 3
end start
BOOLEAN
ApmCall (
DWORD Function,
DWORD Device,
DWORD Mode
)
{
/* AX <== Function */
/* BX <== Device */
/* CX <== Mode */
__asm__("int 21\n"); /* 0x15 */
}
BOOLEAN
HalPowerOff (VOID)
{
ApmCall (
APM_FUNCTION_AVAILABLE,
APM_DEVICE_BIOS,
0
);
ApmCall (
APM_FUNCTION_ENABLEAPM,
);
/* Shutdown CPU */
ApmCall (
APM_FUNCTION_POWEROFF,
APM_DEVICE_ALL,
3
);
return TRUE;
}
/* EOF */

74
reactos/ntoskrnl/hal/x86/reboot.c
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@ -1,74 +0,0 @@
/* $Id: reboot.c,v 1.7 2001/03/16 18:11:21 dwelch Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/reboot.c
* PURPOSE: Reboot functions.
* PROGRAMMER: Eric Kohl (ekohl@abo.rhein-zeitung.de)
* UPDATE HISTORY:
* Created 11/10/99
*/
#include <ddk/ntddk.h>
#include <internal/hal/hal.h>
static VOID
HalReboot (VOID)
{
char data;
BYTE *mem;
/* enable warm reboot */
mem = (BYTE *)(0xd0000000 + 0x0000);
// mem = HalMapPhysicalMemory (0, 1);
mem[0x472] = 0x34;
mem[0x473] = 0x12;
/* disable interrupts */
__asm__("cli\n");
/* disable periodic interrupt (RTC) */
WRITE_PORT_UCHAR((PUCHAR)0x70, 0x0b);
data = READ_PORT_UCHAR((PUCHAR)0x71);
WRITE_PORT_UCHAR((PUCHAR)0x71, data & 0xbf);
/* */
WRITE_PORT_UCHAR((PUCHAR)0x70, 0x0a);
data = READ_PORT_UCHAR((PUCHAR)0x71);
WRITE_PORT_UCHAR((PUCHAR)0x71, (data & 0xf0) | 0x06);
/* */
WRITE_PORT_UCHAR((PUCHAR)0x70, 0x15);
/* generate RESET signal via keyboard controller */
WRITE_PORT_UCHAR((PUCHAR)0x64, 0xfe);
/* stop the processor */
#if 1
__asm__("hlt\n");
#else
for(;;);
#endif
}
VOID STDCALL
HalReturnToFirmware (
ULONG Action
)
{
if (Action == FIRMWARE_HALT)
{
DbgPrint ("HalReturnToFirmware called!\n");
DbgBreakPoint ();
}
else if (Action == FIRMWARE_REBOOT)
{
HalResetDisplay ();
HalReboot ();
}
}
/* EOF */

40
reactos/ntoskrnl/hal/x86/sources
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@ -1,40 +0,0 @@
OBJECTS_HAL_COMMON = \
hal/x86/adapter.o \
hal/x86/beep.o \
hal/x86/bios32.o \
hal/x86/bus.o \
hal/x86/display.o \
hal/x86/dma.o \
hal/x86/drive.o \
hal/x86/enum.o \
hal/x86/fmutex.o \
hal/x86/halinit.o \
hal/x86/isa.o \
hal/x86/kdbg.o \
hal/x86/mbr.o \
hal/x86/misc.o \
hal/x86/mp.o \
hal/x86/parttab.o \
hal/x86/pci.o \
hal/x86/perfcnt.o \
hal/x86/portio.o \
hal/x86/reboot.o \
hal/x86/spinlock.o \
hal/x86/sysbus.o \
hal/x86/sysinfo.o \
hal/x86/time.o \
hal/x86/udelay.o
OBJECTS_HAL_UP = \
hal/x86/irql.o
OBJECTS_HAL_MP = \
hal/x86/mps.o \
hal/x86/mpsboot.o \
hal/x86/mpsirql.o
ifeq ($(MP), 1)
OBJECTS_HAL = $(OBJECTS_HAL_COMMON) $(OBJECTS_HAL_MP)
else
OBJECTS_HAL = $(OBJECTS_HAL_COMMON) $(OBJECTS_HAL_UP)
endif

95
reactos/ntoskrnl/hal/x86/spinlock.c
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@ -1,95 +0,0 @@
/* $Id: spinlock.c,v 1.12 2000/10/07 13:41:50 dwelch Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/spinlock.c
* PURPOSE: Implements spinlocks
* PROGRAMMER: David Welch (welch@cwcom.net)
* Eric Kohl (ekohl@rz-online.de)
* UPDATE HISTORY:
* 09/06/2000 Created
*/
/*
* NOTE: On a uniprocessor machine spinlocks are implemented by raising
* the irq level
*/
/* INCLUDES ****************************************************************/
#include <ddk/ntddk.h>
#include <internal/debug.h>
/* FUNCTIONS ***************************************************************/
VOID STDCALL
KeAcquireSpinLock (
PKSPIN_LOCK SpinLock,
PKIRQL OldIrql
)
/*
* FUNCTION: Acquires a spinlock
* ARGUMENTS:
* SpinLock = Spinlock to acquire
* OldIrql (OUT) = Caller supplied storage for the previous irql
*/
{
KeRaiseIrql(DISPATCH_LEVEL,OldIrql);
KeAcquireSpinLockAtDpcLevel(SpinLock);
}
KIRQL FASTCALL
KeAcquireSpinLockRaiseToSynch (
PKSPIN_LOCK SpinLock
)
{
UNIMPLEMENTED;
}
VOID STDCALL
KeReleaseSpinLock (
PKSPIN_LOCK SpinLock,
KIRQL NewIrql
)
/*
* FUNCTION: Releases a spinlock
* ARGUMENTS:
* SpinLock = Spinlock to release
* NewIrql = Irql level before acquiring the spinlock
*/
{
KeReleaseSpinLockFromDpcLevel(SpinLock);
KeLowerIrql(NewIrql);
}
KIRQL FASTCALL
KfAcquireSpinLock (
PKSPIN_LOCK SpinLock
)
{
KIRQL OldIrql;
KeRaiseIrql(DISPATCH_LEVEL, &OldIrql);
KeAcquireSpinLockAtDpcLevel(SpinLock);
return OldIrql;
}
VOID FASTCALL
KfReleaseSpinLock (
PKSPIN_LOCK SpinLock,
KIRQL NewIrql
)
/*
* FUNCTION: Releases a spinlock
* ARGUMENTS:
* SpinLock = Spinlock to release
* NewIrql = Irql level before acquiring the spinlock
*/
{
KeReleaseSpinLockFromDpcLevel(SpinLock);
KeLowerIrql(NewIrql);
}
/* EOF */

64
reactos/ntoskrnl/hal/x86/sysbus.c
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@ -1,64 +0,0 @@
/* $Id: sysbus.c,v 1.3 2001/06/13 22:17:01 ekohl Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/sysbus.c
* PURPOSE: System bus handler functions
* PROGRAMMER: Eric Kohl (ekohl@rz-online.de)
* UPDATE HISTORY:
* 09/04/2000 Created
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/hal/bus.h>
/* FUNCTIONS ****************************************************************/
ULONG STDCALL
HalpGetSystemInterruptVector(PVOID BusHandler,
ULONG BusNumber,
ULONG BusInterruptLevel,
ULONG BusInterruptVector,
PKIRQL Irql,
PKAFFINITY Affinity)
{
*Irql = HIGH_LEVEL - BusInterruptVector;
*Affinity = 0xFFFFFFFF;
return BusInterruptVector;
}
BOOLEAN STDCALL
HalpTranslateSystemBusAddress(PBUS_HANDLER BusHandler,
ULONG BusNumber,
PHYSICAL_ADDRESS BusAddress,
PULONG AddressSpace,
PPHYSICAL_ADDRESS TranslatedAddress)
{
ULONG BaseAddress = 0;
if (*AddressSpace == 0)
{
/* memory space */
}
else if (*AddressSpace == 1)
{
/* io space */
}
else
{
/* other */
return FALSE;
}
TranslatedAddress->QuadPart = BusAddress.QuadPart + BaseAddress;
return TRUE;
}
/* EOF */

23
reactos/ntoskrnl/hal/x86/sysinfo.c
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@ -1,23 +0,0 @@
/*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/sysinfo.c
* PURPOSE: Getting system information
* PROGRAMMER: David Welch (welch@mcmail.com)
* UPDATE HISTORY:
* Created 22/05/98
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <internal/debug.h>
/* FUNCTIONS *****************************************************************/
VOID HalQuerySystemInformation()
{
UNIMPLEMENTED;
}

307
reactos/ntoskrnl/hal/x86/time.c
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@ -1,307 +0,0 @@
/*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/time.c
* PURPOSE: Getting time information
* UPDATE HISTORY:
*/
/* INCLUDES *****************************************************************/
#include <ddk/ntddk.h>
#include <string.h>
#include <internal/hal/mps.h>
#include <internal/hal/bus.h>
//#define NDEBUG
#include <internal/debug.h>
/* MACROS and CONSTANTS ******************************************************/
/* macro BCD_INT : convert bcd to int */
#define BCD_INT(bcd) (((bcd & 0xf0) >> 4) * 10 + (bcd &0x0f))
/* macro INT_BCD : convert int to bcd */
#define INT_BCD(int) (((int / 10) << 4) + (int % 10))
#define RTC_REGISTER_A 0x0A
#define RTC_REG_A_UIP 0x80 /* Update In Progress bit */
#define RTC_REGISTER_B 0x0B
#define RTC_REGISTER_CENTURY 0x32
/* FUNCTIONS *****************************************************************/
static UCHAR
HalpQueryCMOS(UCHAR Reg)
{
UCHAR Val;
ULONG Flags;
Reg |= 0x80;
pushfl(Flags);
__asm__("cli\n"); // AP unsure as to whether to do this here
WRITE_PORT_UCHAR((PUCHAR)0x70, Reg);
Val = READ_PORT_UCHAR((PUCHAR)0x71);
WRITE_PORT_UCHAR((PUCHAR)0x70, 0);
popfl(Flags);
return(Val);
}
static VOID
HalpSetCMOS(UCHAR Reg,
UCHAR Val)
{
ULONG Flags;
Reg |= 0x80;
pushfl(Flags);
__asm__("cli\n"); // AP unsure as to whether to do this here
WRITE_PORT_UCHAR((PUCHAR)0x70, Reg);
WRITE_PORT_UCHAR((PUCHAR)0x71, Val);
WRITE_PORT_UCHAR((PUCHAR)0x70, 0);
popfl(Flags);
}
static UCHAR
HalpQueryECMOS(USHORT Reg)
{
UCHAR Val;
ULONG Flags;
pushfl(Flags);
__asm__("cli\n"); // AP unsure as to whether to do this here
WRITE_PORT_UCHAR((PUCHAR)0x74, (UCHAR)(Reg & 0x00FF));
WRITE_PORT_UCHAR((PUCHAR)0x75, (UCHAR)(Reg>>8));
Val = READ_PORT_UCHAR((PUCHAR)0x76);
popfl(Flags);
return(Val);
}
static VOID
HalpSetECMOS(USHORT Reg,
UCHAR Val)
{
ULONG Flags;
pushfl(Flags);
__asm__("cli\n"); // AP unsure as to whether to do this here
WRITE_PORT_UCHAR((PUCHAR)0x74, (UCHAR)(Reg & 0x00FF));
WRITE_PORT_UCHAR((PUCHAR)0x75, (UCHAR)(Reg>>8));
WRITE_PORT_UCHAR((PUCHAR)0x76, Val);
popfl(Flags);
}
VOID STDCALL
HalQueryRealTimeClock(PTIME_FIELDS Time)
{
/* check 'Update In Progress' bit */
while (HalpQueryCMOS (RTC_REGISTER_A) & RTC_REG_A_UIP)
;
Time->Second = BCD_INT(HalpQueryCMOS (0));
Time->Minute = BCD_INT(HalpQueryCMOS (2));
Time->Hour = BCD_INT(HalpQueryCMOS (4));
Time->Weekday = BCD_INT(HalpQueryCMOS (6));
Time->Day = BCD_INT(HalpQueryCMOS (7));
Time->Month = BCD_INT(HalpQueryCMOS (8));
Time->Year = BCD_INT(HalpQueryCMOS (9));
if (Time->Year > 80)
Time->Year += 1900;
else
Time->Year += 2000;
#if 0
/* Century */
Time->Year += BCD_INT(HalpQueryCMOS (RTC_REGISTER_CENTURY)) * 100;
#endif
#ifndef NDEBUG
DbgPrint ("HalQueryRealTimeClock() %d:%d:%d %d/%d/%d\n",
Time->Hour,
Time->Minute,
Time->Second,
Time->Day,
Time->Month,
Time->Year
);
#endif
Time->Milliseconds = 0;
}
VOID STDCALL
HalSetRealTimeClock(PTIME_FIELDS Time)
{
/* check 'Update In Progress' bit */
while (HalpQueryCMOS (RTC_REGISTER_A) & RTC_REG_A_UIP)
;
HalpSetCMOS (0, INT_BCD(Time->Second));
HalpSetCMOS (2, INT_BCD(Time->Minute));
HalpSetCMOS (4, INT_BCD(Time->Hour));
HalpSetCMOS (6, INT_BCD(Time->Weekday));
HalpSetCMOS (7, INT_BCD(Time->Day));
HalpSetCMOS (8, INT_BCD(Time->Month));
HalpSetCMOS (9, INT_BCD(Time->Year % 100));
#if 0
/* Century */
HalpSetCMOS (RTC_REGISTER_CENTURY, INT_BCD(Time->Year / 100));
#endif
}
BOOLEAN STDCALL
HalGetEnvironmentVariable(PCH Name,
PCH Value,
USHORT ValueLength)
{
if (_stricmp(Name, "LastKnownGood") != 0)
{
return FALSE;
}
if (HalpQueryCMOS(RTC_REGISTER_B) & 0x01)
{
strncpy(Value, "FALSE", ValueLength);
}
else
{
strncpy(Value, "TRUE", ValueLength);
}
return TRUE;
}
BOOLEAN STDCALL
HalSetEnvironmentVariable(PCH Name,
PCH Value)
{
UCHAR Val;
if (_stricmp(Name, "LastKnownGood") != 0)
return FALSE;
Val = HalpQueryCMOS(RTC_REGISTER_B);
if (_stricmp(Value, "TRUE") == 0)
HalpSetCMOS(RTC_REGISTER_B, Val | 0x01);
else if (_stricmp(Value, "FALSE") == 0)
HalpSetCMOS(RTC_REGISTER_B, Val & ~0x01);
else
return FALSE;
return TRUE;
}
ULONG STDCALL
HalpGetCmosData(PBUS_HANDLER BusHandler,
ULONG BusNumber,
ULONG SlotNumber,
PVOID Buffer,
ULONG Offset,
ULONG Length)
{
PUCHAR Ptr = Buffer;
ULONG Address = SlotNumber;
ULONG Len = Length;
DPRINT("HalpGetCmosData() called.\n");
DPRINT(" BusNumber %lu\n", BusNumber);
DPRINT(" SlotNumber %lu\n", SlotNumber);
DPRINT(" Offset 0x%lx\n", Offset);
DPRINT(" Length 0x%lx\n", Length);
if (Length == 0)
return 0;
if (BusNumber == 0)
{
/* CMOS */
while ((Len > 0) && (Address < 0x100))
{
*Ptr = HalpQueryCMOS((UCHAR)Address);
Ptr = Ptr + 1;
Address++;
Len--;
}
}
else if (BusNumber == 1)
{
/* Extended CMOS */
while ((Len > 0) && (Address < 0x1000))
{
*Ptr = HalpQueryECMOS((USHORT)Address);
Ptr = Ptr + 1;
Address++;
Len--;
}
}
return(Length - Len);
}
ULONG STDCALL
HalpSetCmosData(PBUS_HANDLER BusHandler,
ULONG BusNumber,
ULONG SlotNumber,
PVOID Buffer,
ULONG Offset,
ULONG Length)
{
PUCHAR Ptr = (PUCHAR)Buffer;
ULONG Address = SlotNumber;
ULONG Len = Length;
DPRINT("HalpSetCmosData() called.\n");
DPRINT(" BusNumber %lu\n", BusNumber);
DPRINT(" SlotNumber %lu\n", SlotNumber);
DPRINT(" Offset 0x%lx\n", Offset);
DPRINT(" Length 0x%lx\n", Length);
if (Length == 0)
return 0;
if (BusNumber == 0)
{
/* CMOS */
while ((Len > 0) && (Address < 0x100))
{
HalpSetCMOS((UCHAR)Address, *Ptr);
Ptr = Ptr + 1;
Address++;
Len--;
}
}
else if (BusNumber == 1)
{
/* Extended CMOS */
while ((Len > 0) && (Address < 0x1000))
{
HalpSetECMOS((USHORT)Address, *Ptr);
Ptr = Ptr + 1;
Address++;
Len--;
}
}
return(Length - Len);
}
/* EOF */

223
reactos/ntoskrnl/hal/x86/udelay.c
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@ -1,223 +0,0 @@
/*
* ReactOS kernel
* Copyright (C) 2000 David Welch <welch@cwcom.net>
* Copyright (C) 1999 Gareth Owen <gaz@athene.co.uk>, Ramon von Handel
* Copyright (C) 1991, 1992 Linus Torvalds
*
* This software is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This software is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this software; see the file COPYING. If not, write
* to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge,
* MA 02139, USA.
*
*/
/* $Id: udelay.c,v 1.9 2001/04/18 03:31:19 dwelch Exp $
*
* PROJECT: ReactOS kernel
* FILE: ntoskrnl/hal/x86/udelay.c
* PURPOSE: Busy waiting
* PROGRAMMER: David Welch (david.welch@seh.ox.ac.uk)
* UPDATE HISTORY:
* 06/11/99 Created
*/
/* INCLUDES ***************************************************************/
#include <ddk/ntddk.h>
//#define NDEBUG
#include <internal/debug.h>
/* GLOBALS ******************************************************************/
static unsigned int delay_count = 1;
#define MILLISEC (10)
#define FREQ (1000/MILLISEC)
#define PRECISION (8)
#define TMR_CTRL 0x43 /* I/O for control */
#define TMR_CNT0 0x40 /* I/O for counter 0 */
#define TMR_CNT1 0x41 /* I/O for counter 1 */
#define TMR_CNT2 0x42 /* I/O for counter 2 */
#define TMR_SC0 0 /* Select channel 0 */
#define TMR_SC1 0x40 /* Select channel 1 */
#define TMR_SC2 0x80 /* Select channel 2 */
#define TMR_LOW 0x10 /* RW low byte only */
#define TMR_HIGH 0x20 /* RW high byte only */
#define TMR_BOTH 0x30 /* RW both bytes */
#define TMR_MD0 0 /* Mode 0 */
#define TMR_MD1 0x2 /* Mode 1 */
#define TMR_MD2 0x4 /* Mode 2 */
#define TMR_MD3 0x6 /* Mode 3 */
#define TMR_MD4 0x8 /* Mode 4 */
#define TMR_MD5 0xA /* Mode 5 */
#define TMR_BCD 1 /* BCD mode */
#define TMR_LATCH 0 /* Latch command */
#define TMR_READ 0xF0 /* Read command */
#define TMR_CNT 0x20 /* CNT bit (Active low, subtract it) */
#define TMR_STAT 0x10 /* Status bit (Active low, subtract it) */
#define TMR_CH2 0x8 /* Channel 2 bit */
#define TMR_CH1 0x4 /* Channel 1 bit */
#define TMR_CH0 0x2 /* Channel 0 bit */
static BOOLEAN UdelayCalibrated = FALSE;
/* FUNCTIONS **************************************************************/
void init_pit(float h, unsigned char channel)
{
unsigned int temp=0;
temp = 1193180/h;
// WRITE_PORT_UCHAR((PUCHAR)TMR_CTRL,
// (channel*0x40) + TMR_BOTH + TMR_MD3);
WRITE_PORT_UCHAR((PUCHAR)TMR_CTRL,
(channel*0x40) + TMR_BOTH + TMR_MD2);
WRITE_PORT_UCHAR((PUCHAR)(0x40+channel),
(unsigned char) temp);
WRITE_PORT_UCHAR((PUCHAR)(0x40+channel),
(unsigned char) (temp>>8));
}
VOID STDCALL
__KeStallExecutionProcessor(ULONG Loops)
{
register unsigned int i;
for (i=0; i<Loops;i++);
}
VOID STDCALL KeStallExecutionProcessor(ULONG Microseconds)
{
return(__KeStallExecutionProcessor((delay_count*Microseconds)/1000));
}
#define HZ (100)
#define CLOCK_TICK_RATE (1193182)
#define LATCH (CLOCK_TICK_RATE / HZ)
static ULONG Read8254Timer(VOID)
{
ULONG Count;
WRITE_PORT_UCHAR((PUCHAR)0x43, 0x00);
Count = READ_PORT_UCHAR((PUCHAR)0x40);
Count |= READ_PORT_UCHAR((PUCHAR)0x40) << 8;
return Count;
}
static VOID WaitFor8254Wraparound(VOID)
{
ULONG CurCount, PrevCount = ~0;
LONG Delta;
CurCount = Read8254Timer();
do {
PrevCount = CurCount;
CurCount = Read8254Timer();
Delta = CurCount - PrevCount;
/*
* This limit for delta seems arbitrary, but it isn't, it's
* slightly above the level of error a buggy Mercury/Neptune
* chipset timer can cause.
*/
} while (Delta < 300);
}
VOID HalpCalibrateStallExecution(VOID)
{
ULONG i;
ULONG calib_bit;
ULONG CurCount;
if (UdelayCalibrated)
return;
UdelayCalibrated = TRUE;
DbgPrint("Calibrating delay loop... [");
/* Initialise timer interrupt with MILLISECOND ms interval */
WRITE_PORT_UCHAR((PUCHAR)0x43, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH & 0xff); /* LSB */
WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH >> 8); /* MSB */
/* Stage 1: Coarse calibration */
WaitFor8254Wraparound();
delay_count = 1;
do {
delay_count <<= 1; /* Next delay count to try */
WaitFor8254Wraparound();
__KeStallExecutionProcessor(delay_count); /* Do the delay */
CurCount = Read8254Timer();
} while (CurCount > LATCH / 2);
delay_count >>= 1; /* Get bottom value for delay */
/* Stage 2: Fine calibration */
DbgPrint("delay_count: %d", delay_count);
calib_bit = delay_count; /* Which bit are we going to test */
for(i=0;i<PRECISION;i++) {
calib_bit >>= 1; /* Next bit to calibrate */
if(!calib_bit) break; /* If we have done all bits, stop */
delay_count |= calib_bit; /* Set the bit in delay_count */
WaitFor8254Wraparound();
__KeStallExecutionProcessor(delay_count); /* Do the delay */
CurCount = Read8254Timer();
if (CurCount <= LATCH / 2) /* If a tick has passed, turn the */
delay_count &= ~calib_bit; /* calibrated bit back off */
}
/* We're finished: Do the finishing touches */
delay_count /= (MILLISEC / 2); /* Calculate delay_count for 1ms */
DbgPrint("]\n");
DbgPrint("delay_count: %d\n", delay_count);
DbgPrint("CPU speed: %d\n", delay_count/250);
#if 0
DbgPrint("About to start delay loop test\n");
DbgPrint("Waiting for five minutes...");
for (i = 0; i < (5*60*1000*20); i++)
{
KeStallExecutionProcessor(50);
}
DbgPrint("finished\n");
for(;;);
#endif
}
/* EOF */