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[ASM]

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- Fix geninc and spec2def to support the MS ARM assembler
- Add an MSVC compatible version of kxarm.h
- autogenerate ksarm.h with geninc.c
- Move some ARM definitions to NDK

svn path=/trunk/; revision=63501
This commit is contained in:
Timo Kreuzer 2014-05-30 00:30:38 +00:00
parent 717f8cb0e9
commit 137dc25b64
9 changed files with 261 additions and 204 deletions
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12
reactos/include/asm/CMakeLists.txt
View file

@ -11,17 +11,19 @@ else()
endif()
if(ARCH STREQUAL "i386")
set(_filename ks386)
set(_filename ks386.inc)
elseif(ARCH STREQUAL "amd64")
set(_filename ksamd64)
set(_filename ksamd64.inc)
elseif(ARCH STREQUAL "arm")
set(_filename ksarm.h)
endif()
get_target_property(genincdata_dll genincdata LOCATION)
add_custom_command(
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${_filename}.inc
COMMAND native-geninc ${genincdata_dll} ${CMAKE_CURRENT_BINARY_DIR}/${_filename}.inc ${OPT_MS}
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${_filename}
COMMAND native-geninc ${genincdata_dll} ${CMAKE_CURRENT_BINARY_DIR}/${_filename} ${OPT_MS}
DEPENDS genincdata native-geninc)
add_custom_target(asm
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${_filename}.inc)
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${_filename})

5
reactos/include/asm/genincdata.c
View file

@ -74,15 +74,18 @@ __attribute__ ((section(".asmdef")))
ASMGENDATA Table[] =
{
#if defined (_M_IX86) || defined (M_AMD64)
/* PORTABLE CONSTANTS ********************************************************/
#include "ksx.template.h"
#endif
/* ARCHITECTURE SPECIFIC CONTSTANTS ******************************************/
#ifdef _M_IX86
#include "ks386.template.h"
#elif defined(_M_AMD64)
#include "ksamd64.template.h"
#elif defined(_M_ARM)
#include "ksarm.template.h"
#endif
/* End of list */

105
reactos/include/asm/ksarm.template.h Normal file
View file

@ -0,0 +1,105 @@
RAW(""),
RAW("#include <kxarm.h>"),
RAW(""),
HEADER("CPSR Values"),
CONSTANT(CPSR_THUMB_ENABLE),
CONSTANT(CPSR_FIQ_DISABLE),
CONSTANT(CPSR_IRQ_DISABLE),
CONSTANT(CPSR_USER_MODE),
CONSTANT(CPSR_FIQ_MODE),
CONSTANT(CPSR_IRQ_MODE),
CONSTANT(CPSR_SVC_MODE),
CONSTANT(CPSR_ABORT_MODE),
CONSTANT(CPSR_UND_MODE),
CONSTANT(CPSR_MODES),
HEADER("C1 Register Values"),
CONSTANT(C1_MMU_CONTROL),
CONSTANT(C1_ALIGNMENT_CONTROL),
CONSTANT(C1_DCACHE_CONTROL),
CONSTANT(C1_ICACHE_CONTROL),
CONSTANT(C1_VECTOR_CONTROL),
HEADER("Loader Parameter Block Offsets"),
OFFSET(LpbKernelStack, LOADER_PARAMETER_BLOCK, KernelStack),
OFFSET(LpbPanicStack, LOADER_PARAMETER_BLOCK, u.Arm.PanicStack),
OFFSET(LpbInterruptStack, LOADER_PARAMETER_BLOCK, u.Arm.InterruptStack),
HEADER("Trap Frame offsets"),
OFFSET(TrDbgArgMark, KTRAP_FRAME, DbgArgMark),
OFFSET(TrR0, KTRAP_FRAME, R0),
OFFSET(TrR1, KTRAP_FRAME, R1),
OFFSET(TrR2, KTRAP_FRAME, R2),
OFFSET(TrR3, KTRAP_FRAME, R3),
OFFSET(TrR4, KTRAP_FRAME, R4),
OFFSET(TrR5, KTRAP_FRAME, R5),
OFFSET(TrR6, KTRAP_FRAME, R6),
OFFSET(TrR7, KTRAP_FRAME, R7),
OFFSET(TrR8, KTRAP_FRAME, R8),
OFFSET(TrR9, KTRAP_FRAME, R9),
OFFSET(TrR10, KTRAP_FRAME, R10),
OFFSET(TrR11, KTRAP_FRAME, R11),
OFFSET(TrR12, KTRAP_FRAME, R12),
OFFSET(TrUserSp, KTRAP_FRAME, UserSp),
OFFSET(TrUserLr, KTRAP_FRAME, UserLr),
OFFSET(TrSvcSp, KTRAP_FRAME, SvcSp),
OFFSET(TrSvcLr, KTRAP_FRAME, SvcLr),
OFFSET(TrPc, KTRAP_FRAME, Pc),
OFFSET(TrSpsr, KTRAP_FRAME, Spsr),
SIZE(TrapFrameLength, KTRAP_FRAME),
HEADER("Exception Frame offsets"),
OFFSET(ExR4, KEXCEPTION_FRAME, R4),
OFFSET(ExR5, KEXCEPTION_FRAME, R5),
OFFSET(ExR6, KEXCEPTION_FRAME, R6),
OFFSET(ExR7, KEXCEPTION_FRAME, R7),
OFFSET(ExR8, KEXCEPTION_FRAME, R8),
OFFSET(ExR9, KEXCEPTION_FRAME, R9),
OFFSET(ExR10, KEXCEPTION_FRAME, R10),
OFFSET(ExR11, KEXCEPTION_FRAME, R11),
OFFSET(ExLr, KEXCEPTION_FRAME, Lr),
OFFSET(ExSpsr, KEXCEPTION_FRAME, Psr), // name?
SIZE(ExceptionFrameLength, KEXCEPTION_FRAME),
HEADER("PCR"),
CONSTANTX(KiPcr, 0xFFFFF000),
HEADER("PCR Offsets"),
//OFFSET(PcCurrentIrql, KPCR, CurrentIrql),
HEADER("KTHREAD Offsets"),
OFFSET(ThKernelStack, KTHREAD, KernelStack),
HEADER("CONTEXT Offsets"),
OFFSET(CsContextFlags, CONTEXT, ContextFlags),
OFFSET(CsR0, CONTEXT, R0),
OFFSET(CsR1, CONTEXT, R1),
OFFSET(CsR2, CONTEXT, R2),
OFFSET(CsR3, CONTEXT, R3),
OFFSET(CsR4, CONTEXT, R4),
OFFSET(CsR5, CONTEXT, R5),
OFFSET(CsR6, CONTEXT, R6),
OFFSET(CsR7, CONTEXT, R7),
OFFSET(CsR8, CONTEXT, R8),
OFFSET(CsR9, CONTEXT, R9),
OFFSET(CsR10, CONTEXT, R10),
OFFSET(CsR11, CONTEXT, R11),
OFFSET(CsR12, CONTEXT, R12),
OFFSET(CsSp, CONTEXT, Sp),
OFFSET(CsLr, CONTEXT, Lr),
OFFSET(CsPc, CONTEXT, Pc),
OFFSET(CsPsr, CONTEXT, Psr),
CONSTANT(CONTEXT_FULL),
HEADER("DebugService Control Types"),
CONSTANT(BREAKPOINT_BREAK),
CONSTANT(BREAKPOINT_PRINT),
CONSTANT(BREAKPOINT_PROMPT),
CONSTANT(BREAKPOINT_LOAD_SYMBOLS),
CONSTANT(BREAKPOINT_UNLOAD_SYMBOLS),
CONSTANT(BREAKPOINT_COMMAND_STRING),

157
reactos/ntoskrnl/include/internal/arm/kxarm.h → reactos/include/asm/kxarm.h
View file

@ -1,22 +1,103 @@
#ifdef _MSC_VER
/* Globals */
GBLS AreaName
GBLS FuncName
GBLS PrologName
GBLS FuncEndName
AreaName SETS "|.text|"
MACRO
TEXTAREA
AREA |.text|,ALIGN=2,CODE,READONLY
AreaName SETS "|.text|"
MEND
MACRO
NESTED_ENTRY $Name
FuncName SETS "$Name"
PrologName SETS "$Name":CC:"_Prolog"
FuncEndName SETS "$Name":CC:"_end"
AREA |.pdata|,ALIGN=2,PDATA
ALIGN 2
EXPORT $FuncName [FUNC]
$FuncName
ROUT
MEND
MACRO
PROLOG_END
$PrologName
MEND
MACRO
ENTRY_END $Name
$FuncEndName
MEND
MACRO
LEAF_ENTRY $Name
FuncName SETS "$Name"
PrologName SETS "Invalid Prolog"
FuncEndName SETS "$Name":CC:"_end"
ALIGN 2
EXPORT $FuncName [FUNC]
$FuncName
ROUT
MEND
MACRO
LEAF_END $Name
$FuncEndName
MEND
MACRO
TRAP_PROLOG $Abort
fixme
MEND
MACRO
SYSCALL_PROLOG $Abort
fixme
MEND
MACRO
TRAP_EPILOG $SystemCall
fixme
MEND
#else
/* Compatibility define */
#define EQU .equ
.macro IMPORT Name
/* Ignore */
.endm
.macro TEXTAREA
.section .text, "rx"
.align 2
.endm
.macro NESTED_ENTRY Name
.global &Name
FuncName .equ &Name
PrologName .equ &Name&_Prolog
FuncEndName .equ &Name&_end
.global &FuncName
.align 2
.func &Name
&Name:
.func &FuncName
&FuncName:
.endm
.macro PROLOG_END Name
prolog_&Name:
.macro PROLOG_END
\PrologName:
.endm
.macro ENTRY_END Name
end_&Name:
&FuncEndName:
.endfunc
.endm
@ -30,57 +111,39 @@
sub lr, lr, #4
.endif
//
// Save the bottom 4 registers
//
stmdb sp, {r0-r3}
//
// Save the abort lr, sp, spsr, cpsr
//
mov r0, lr
mov r1, sp
mrs r2, cpsr
mrs r3, spsr
//
// Switch to SVC mode
//
bic r2, r2, #CPSR_MODES
orr r2, r2, #CPSR_SVC_MODE
msr cpsr_c, r2
//
// Save the SVC sp before we modify it
//
mov r2, sp
//
// Make space for the trap frame
//
sub sp, sp, #TrapFrameLength
//
// Save abt32 state
//
str r0, [sp, #TrPc]
str lr, [sp, #TrSvcLr]
str r2, [sp, #TrSvcSp]
//
str r2, [sp, #TrSvcSp]
// Restore the saved SPSR
//
msr spsr_all, r3
//
// Restore our 4 registers
//
ldmdb r1, {r0-r3}
//
// Build trap frame
// FIXME: Change to stmdb later
//
str r0, [sp, #TrR0]
str r1, [sp, #TrR1]
str r2, [sp, #TrR2]
@ -102,17 +165,13 @@
ldr r0, =0xBADB0D00
str r0, [sp, #TrDbgArgMark]
.endm
.macro SYSCALL_PROLOG
//
// Make space for the trap frame
//
sub sp, sp, #TrapFrameLength
//
// Build trap frame
// FIXME: Change to stmdb later
//
str r0, [sp, #TrR0]
str r1, [sp, #TrR1]
str r2, [sp, #TrR2]
@ -136,26 +195,20 @@
ldr r0, =0xBADB0D00
str r0, [sp, #TrDbgArgMark]
.endm
.macro TRAP_EPILOG SystemCall
//
// ASSERT(TrapFrame->DbgArgMark == 0xBADB0D00)
//
ldr r0, [sp, #TrDbgArgMark]
ldr r1, =0xBADB0D00
cmp r0, r1
bne 1f
//
// Get the SPSR and restore it
//
ldr r0, [sp, #TrSpsr]
msr spsr_all, r0
//
// Restore the registers
// FIXME: Use LDMIA later
//
mov r0, sp
add r0, r0, #TrUserSp
ldm r0, {sp, lr}^
@ -172,10 +225,8 @@
ldr r10, [sp, #TrR10]
ldr r11, [sp, #TrR11]
ldr r12, [sp, #TrR12]
//
// Restore program execution state
//
.if \SystemCall
ldr lr, [sp, #TrPc]
add sp, sp, #TrapFrameLength
@ -187,3 +238,7 @@
1:
b .
.endm
#endif

23
reactos/include/ndk/arm/ketypes.h
View file

@ -27,6 +27,29 @@ extern "C" {
// Dependencies
//
//
// CPSR Values
//
#define CPSR_THUMB_ENABLE 0x20
#define CPSR_FIQ_DISABLE 0x40
#define CPSR_IRQ_DISABLE 0x80
#define CPSR_USER_MODE 0x10
#define CPSR_FIQ_MODE 0x11
#define CPSR_IRQ_MODE 0x12
#define CPSR_SVC_MODE 0x13
#define CPSR_ABORT_MODE 0x17
#define CPSR_UND_MODE 0x1B
#define CPSR_MODES 0x1F
//
// C1 Register Values
//
#define C1_MMU_CONTROL 0x01
#define C1_ALIGNMENT_CONTROL 0x02
#define C1_DCACHE_CONTROL 0x04
#define C1_ICACHE_CONTROL 0x1000
#define C1_VECTOR_CONTROL 0x2000
//
// IPI Types
//

2
reactos/include/reactos/arm/armddk.h
View file

@ -228,6 +228,7 @@ extern volatile struct _KSYSTEM_TIME KeTickCount;
#define RESULT_NEGATIVE 1
#define RESULT_POSITIVE 2
#if 0
DECLSPEC_IMPORT
VOID
__fastcall
@ -240,6 +241,7 @@ KIRQL
__fastcall
KfAcquireSpinLock(
IN OUT ULONG_PTR* SpinLock);
#endif
#ifndef _WINNT_
//

146
reactos/ntoskrnl/include/internal/arm/ksarm.h
View file

@ -1,146 +0,0 @@
/*
* PROJECT: ReactOS Kernel
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: ntoskrnl/include/internal/arm/ksarm.h
* PURPOSE: Definitions and offsets for ARM Assembly and C code
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#ifdef _ASM_
/*
* CPSR Values
*/
.equ CPSR_THUMB_ENABLE, 0x20
.equ CPSR_FIQ_DISABLE, 0x40
.equ CPSR_IRQ_DISABLE, 0x80
.equ CPSR_USER_MODE, 0x10
.equ CPSR_FIQ_MODE, 0x11
.equ CPSR_IRQ_MODE, 0x12
.equ CPSR_SVC_MODE, 0x13
.equ CPSR_ABORT_MODE, 0x17
.equ CPSR_UND_MODE, 0x1B
.equ CPSR_MODES, 0x1F
/*
* C1 Register Values
*/
.equ C1_MMU_CONTROL, 0x01
.equ C1_ALIGNMENT_CONTROL, 0x02
.equ C1_DCACHE_CONTROL, 0x04
.equ C1_ICACHE_CONTROL, 0x1000
.equ C1_VECTOR_CONTROL, 0x2000
/*
* Loader Parameter Block Offsets
*/
.equ LpbKernelStack, 0x18
.equ LpbPanicStack, 0x74
.equ LpbInterruptStack, 0x5C
/*
* Trap Frame offsets
*/
.equ TrDbgArgMark, 0x00
.equ TrR0, 0x04
.equ TrR1, 0x08
.equ TrR2, 0x0C
.equ TrR3, 0x10
.equ TrR4, 0x14
.equ TrR5, 0x18
.equ TrR6, 0x1C
.equ TrR7, 0x20
.equ TrR8, 0x24
.equ TrR9, 0x28
.equ TrR10, 0x2C
.equ TrR11, 0x30
.equ TrR12, 0x34
.equ TrUserSp, 0x38
.equ TrUserLr, 0x3C
.equ TrSvcSp, 0x40
.equ TrSvcLr, 0x44
.equ TrPc, 0x48
.equ TrSpsr, 0x4C
.equ TrapFrameLength, (23 * 0x04)
/*
* Exception Frame offsets
*/
.equ ExR4, 0x00
.equ ExR5, 0x04
.equ ExR6, 0x08
.equ ExR7, 0x0C
.equ ExR8, 0x10
.equ ExR9, 0x14
.equ ExR10, 0x18
.equ ExR11, 0x1C
.equ ExLr, 0x20
.equ ExSpsr, 0x24
.equ ExceptionFrameLength, (10 * 0x04)
/*
* PCR
*/
.equ KiPcr, 0xFFFFF000
/*
* PCR Offsets
*/
.equ PcCurrentIrql, 0x14C
/*
* KTHREAD Offsets
*/
.equ ThKernelStack, 0x20
/*
* CONTEXT Offsets
*/
.equ CONTEXT_FULL, 0x43
.equ CsContextFlags, 0x00
.equ CsR0, 0x04
.equ CsR1, 0x08
.equ CsR2, 0x0C
.equ CsR3, 0x10
.equ CsR4, 0x14
.equ CsR5, 0x18
.equ CsR6, 0x1C
.equ CsR7, 0x20
.equ CsR8, 0x24
.equ CsR9, 0x28
.equ CsR10, 0x2C
.equ CsR11, 0x30
.equ CsR12, 0x34
.equ CsSp, 0x38
.equ CsLr, 0x3C
.equ CsPc, 0x40
.equ CsPsr, 0x44
/*
* DebugService Control Types
*/
.equ BREAKPOINT_BREAK, 0
.equ BREAKPOINT_PRINT, 1
.equ BREAKPOINT_PROMPT, 2
.equ BREAKPOINT_LOAD_SYMBOLS, 3
.equ BREAKPOINT_UNLOAD_SYMBOLS, 4
.equ BREAKPOINT_COMMAND_STRING, 5
#else
/*
* CPSR Values
*/
#define CPSR_THUMB_ENABLE 0x20
#define CPSR_FIQ_DISABLE 0x40
#define CPSR_IRQ_DISABLE 0x80
#define CPSR_USER_MODE 0x10
#define CPSR_FIQ_MODE 0x11
#define CPSR_IRQ_MODE 0x12
#define CPSR_SVC_MODE 0x13
#define CPSR_ABORT_MODE 0x17
#define CPSR_UND_MODE 0x1B
#define CPSR_MODES 0x1F
#endif

9
reactos/tools/geninc/geninc.c
View file

@ -188,7 +188,14 @@ int main(int argc, char* argv[])
case TYPE_CONSTANT:
if (ms_format)
{
fprintf(output, "%s equ 0%"PRIx64"h\n", data.Name, data.Value);
if (Machine == IMAGE_FILE_MACHINE_ARMNT)
{
fprintf(output, "%s equ 0x%"PRIx64"\n", data.Name, data.Value);
}
else
{
fprintf(output, "%s equ 0%"PRIx64"h\n", data.Name, data.Value);
}
}
else
{

6
reactos/tools/spec2def/spec2def.c
View file

@ -258,7 +258,13 @@ OutputHeader_asmstub(FILE *file, char *libname)
fprintf(file, "; File generated automatically, do not edit! \n\n");
if (giArch == ARCH_X86)
{
fprintf(file, ".586\n.model flat\n");
}
else if (giArch == ARCH_ARM)
{
fprintf(file, "#include <kxarm.h>\n TEXTAREA\n");
}
fprintf(file, ".code\n");
}