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[FREELDR] Slightly revamp the Exception BSOD screen.
- Don't store trailing newlines in the exception description text strings. - Remove unused i386PrintChar(). - Display CR4 in x86. - Use the "indentation" printf generation trick in order to get aligned strings for (CF4 and) DR6 and DR7, without having to hardcode the tons of alignment whitespaces (--> make the strings stored in freeldr shorter). - Show the IP/ErrorCode/EFlags/GDTR/IDTR/LDTR values vertically aligned. - Display the stack frames in both x86 and x64 modes. - Adjust the instruction pointer when a BREAKPOINT or OVERFLOW exception arises, so that the offending instruction can show up in the instruction stream.
This commit is contained in:
Hermès Bélusca-Maïto
parent
2c9dbacebb
commit
0d00a5d6eb
2 changed files with 61 additions and 58 deletions
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@ -5,31 +5,31 @@
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typedef struct _FRAME
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{
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struct _FRAME *Next;
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void *Address;
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struct _FRAME* Next;
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PVOID Address;
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} FRAME;
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static const CHAR *i386ExceptionDescriptionText[] =
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{
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"Exception 00: DIVIDE BY ZERO\n\n",
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"Exception 01: DEBUG EXCEPTION\n\n",
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"Exception 02: NON-MASKABLE INTERRUPT EXCEPTION\n\n",
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"Exception 03: BREAKPOINT (INT 3)\n\n",
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"Exception 04: OVERFLOW\n\n",
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"Exception 05: BOUND EXCEPTION\n\n",
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"Exception 06: INVALID OPCODE\n\n",
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"Exception 07: FPU NOT AVAILABLE\n\n",
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"Exception 08: DOUBLE FAULT\n\n",
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"Exception 09: COPROCESSOR SEGMENT OVERRUN\n\n",
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"Exception 0A: INVALID TSS\n\n",
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"Exception 0B: SEGMENT NOT PRESENT\n\n",
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"Exception 0C: STACK EXCEPTION\n\n",
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"Exception 0D: GENERAL PROTECTION FAULT\n\n",
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"Exception 0E: PAGE FAULT\n\n",
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"Exception 0F: Reserved\n\n",
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"Exception 10: COPROCESSOR ERROR\n\n",
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"Exception 11: ALIGNMENT CHECK\n\n",
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"Exception 12: MACHINE CHECK\n\n"
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"Exception 00: DIVIDE BY ZERO",
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"Exception 01: DEBUG EXCEPTION",
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"Exception 02: NON-MASKABLE INTERRUPT EXCEPTION",
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"Exception 03: BREAKPOINT (INT 3)",
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"Exception 04: OVERFLOW",
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"Exception 05: BOUND EXCEPTION",
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"Exception 06: INVALID OPCODE",
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"Exception 07: FPU NOT AVAILABLE",
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"Exception 08: DOUBLE FAULT",
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"Exception 09: COPROCESSOR SEGMENT OVERRUN",
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"Exception 0A: INVALID TSS",
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"Exception 0B: SEGMENT NOT PRESENT",
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"Exception 0C: STACK EXCEPTION",
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"Exception 0D: GENERAL PROTECTION FAULT",
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"Exception 0E: PAGE FAULT",
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"Exception 0F: Reserved",
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"Exception 10: COPROCESSOR ERROR",
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"Exception 11: ALIGNMENT CHECK",
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"Exception 12: MACHINE CHECK"
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};
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#define SCREEN_ATTR 0x1F // Bright white on blue background
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@ -38,14 +38,6 @@ static const CHAR *i386ExceptionDescriptionText[] =
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static ULONG i386_ScreenPosX = 0;
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static ULONG i386_ScreenPosY = 0;
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#if 0
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static void
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i386PrintChar(CHAR chr, ULONG x, ULONG y)
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{
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MachVideoPutChar(chr, SCREEN_ATTR, x, y);
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}
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#endif
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static void
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i386PrintText(CHAR *pszText)
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{
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@ -96,18 +88,17 @@ PrintText(const CHAR *Format, ...)
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static void
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i386PrintFrames(PKTRAP_FRAME TrapFrame)
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{
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FRAME *Frame;
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FRAME* Frame;
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PrintText("Frames:\n");
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for (Frame =
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#ifdef _M_IX86
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for (Frame = (FRAME*)TrapFrame->Ebp;
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Frame != 0 && (ULONG_PTR)Frame < STACKADDR;
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Frame = Frame->Next)
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(FRAME*)TrapFrame->Ebp;
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#else
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for (Frame = (FRAME*)TrapFrame->TrapFrame;
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Frame != 0 && (ULONG_PTR)Frame < STACKADDR;
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Frame = Frame->Next)
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(FRAME*)TrapFrame->TrapFrame;
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#endif
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Frame != NULL && (ULONG_PTR)Frame < STACKADDR;
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Frame = Frame->Next)
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{
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PrintText("%p ", Frame->Address);
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}
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@ -126,7 +117,8 @@ i386PrintExceptionText(ULONG TrapIndex, PKTRAP_FRAME TrapFrame, PKSPECIAL_REGIST
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PrintText("An error occured in " VERSION "\n"
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"Report this error on the ReactOS Bug Tracker: https://jira.reactos.org\n\n"
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"0x%02lx: %s\n", TrapIndex, i386ExceptionDescriptionText[TrapIndex]);
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"0x%02lx: %s\n\n", TrapIndex, i386ExceptionDescriptionText[TrapIndex]);
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#ifdef _M_IX86
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PrintText("EAX: %.8lx ESP: %.8lx CR0: %.8lx DR0: %.8lx\n",
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TrapFrame->Eax, TrapFrame->HardwareEsp, Special->Cr0, TrapFrame->Dr0);
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@ -136,29 +128,28 @@ i386PrintExceptionText(ULONG TrapIndex, PKTRAP_FRAME TrapFrame, PKSPECIAL_REGIST
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TrapFrame->Ecx, TrapFrame->Esi, Special->Cr2, TrapFrame->Dr2);
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PrintText("EDX: %.8lx EDI: %.8lx CR3: %.8lx DR3: %.8lx\n",
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TrapFrame->Edx, TrapFrame->Edi, Special->Cr3, TrapFrame->Dr3);
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PrintText(" DR6: %.8lx\n",
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TrapFrame->Dr6);
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PrintText(" DR7: %.8lx\n\n",
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TrapFrame->Dr7);
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PrintText("%*s CR4: %.8lx DR6: %.8lx\n",
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41, "", Special->Cr4, TrapFrame->Dr6);
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PrintText("%*s DR7: %.8lx\n",
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62, "", TrapFrame->Dr7);
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/* NOTE: Segment registers are intrinsically 16 bits. Even if the x86
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* KTRAP_FRAME structure stores them as ULONG, only their lower 16 bits
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* are initialized. We thus cast them to USHORT before display. */
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PrintText("CS: %.4lx EIP: %.8lx\n",
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PrintText(" CS: %.4lx EIP: %.8lx\n",
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(USHORT)TrapFrame->SegCs, TrapFrame->Eip);
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PrintText("DS: %.4lx ERROR CODE: %.8lx\n",
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PrintText(" DS: %.4lx ERROR CODE: %.8lx\n",
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(USHORT)TrapFrame->SegDs, TrapFrame->ErrCode);
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PrintText("ES: %.4lx EFLAGS: %.8lx\n",
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PrintText(" ES: %.4lx EFLAGS: %.8lx\n",
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(USHORT)TrapFrame->SegEs, TrapFrame->EFlags);
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PrintText("FS: %.4lx GDTR Base: %.8lx Limit: %.4x\n",
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PrintText(" FS: %.4lx GDTR Base: %.8lx Limit: %.4x\n",
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// " FS: %.4lx GDTR: Base %.8lx Limit %.4x\n"
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(USHORT)TrapFrame->SegFs, Special->Gdtr.Base, Special->Gdtr.Limit);
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PrintText("GS: %.4lx IDTR Base: %.8lx Limit: %.4x\n",
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PrintText(" GS: %.4lx IDTR Base: %.8lx Limit: %.4x\n",
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// " GS: %.4lx IDTR: Base %.8lx Limit %.4x\n",
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(USHORT)TrapFrame->SegGs, Special->Idtr.Base, Special->Idtr.Limit);
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PrintText("SS: %.4lx LDTR: %.4lx TR: %.4lx\n\n",
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PrintText(" SS: %.4lx LDTR: %.4lx TR: %.4lx\n\n",
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(USHORT)TrapFrame->HardwareSegSs, Special->Ldtr, Special->Tr);
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i386PrintFrames(TrapFrame); // Display frames
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InstructionPointer = (PUCHAR)TrapFrame->Eip;
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#else
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PrintText("RAX: %.8lx R8: %.8lx R12: %.8lx RSI: %.8lx\n",
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TrapFrame->Rax, TrapFrame->R8, 0, TrapFrame->Rsi);
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@ -169,21 +160,33 @@ i386PrintExceptionText(ULONG TrapIndex, PKTRAP_FRAME TrapFrame, PKSPECIAL_REGIST
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PrintText("RDX: %.8lx R11: %.8lx R15: %.8lx RSP: %.8lx\n",
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TrapFrame->Rdx, TrapFrame->R11, 0, TrapFrame->Rsp);
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PrintText("CS: %.4lx RIP: %.8lx\n",
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PrintText(" CS: %.4lx RIP: %.8lx\n",
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TrapFrame->SegCs, TrapFrame->Rip);
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PrintText("DS: %.4lx ERROR CODE: %.8lx\n",
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PrintText(" DS: %.4lx ERROR CODE: %.8lx\n",
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TrapFrame->SegDs, TrapFrame->ErrorCode);
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PrintText("ES: %.4lx EFLAGS: %.8lx\n",
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PrintText(" ES: %.4lx EFLAGS: %.8lx\n",
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TrapFrame->SegEs, TrapFrame->EFlags);
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PrintText("FS: %.4lx GDTR Base: %.8lx Limit: %.4x\n",
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PrintText(" FS: %.4lx GDTR Base: %.8lx Limit: %.4x\n",
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TrapFrame->SegFs, Special->Gdtr.Base, Special->Gdtr.Limit);
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PrintText("GS: %.4lx IDTR Base: %.8lx Limit: %.4x\n",
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PrintText(" GS: %.4lx IDTR Base: %.8lx Limit: %.4x\n",
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TrapFrame->SegGs, Special->Idtr.Base, Special->Idtr.Limit);
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PrintText("SS: %.4lx LDTR: %.4lx TR: %.4lx\n\n",
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PrintText(" SS: %.4lx LDTR: %.4lx TR: %.4lx\n\n",
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TrapFrame->SegSs, Special->Ldtr, Special->Tr);
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#endif
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/* Display the stack frames */
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i386PrintFrames(TrapFrame);
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#ifdef _M_IX86
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InstructionPointer = (PUCHAR)TrapFrame->Eip;
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#else
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InstructionPointer = (PUCHAR)TrapFrame->Rip;
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#endif
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PrintText("\nInstruction stream: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x \n",
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/* Adjust IP for #BP (INT 03) or #OF to point to the offending instruction */
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if ((TrapIndex == 3) || (TrapIndex == 4))
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InstructionPointer--;
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PrintText("\nInstruction stream: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n",
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InstructionPointer[0], InstructionPointer[1],
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InstructionPointer[2], InstructionPointer[3],
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InstructionPointer[4], InstructionPointer[5],
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@ -82,7 +82,7 @@ MACRO(SAVE_CPU_REGS)
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push eax
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ENDM
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/* Set by each exception handler to the address of the description text */
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/* Set by each exception handler to the index of the description text */
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i386ExceptionIndex:
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.long 0
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