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[FAST486]

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Fix TLB flushing. An unused entry should be INVALID_TLB_ENTRY (0xFFFFFFFF) and not 0.


svn path=/trunk/; revision=67695
This commit is contained in:
Aleksandar Andrejevic 2015-05-12 17:09:16 +00:00
parent 3889e12a3a
commit 091319ab73
2 changed files with 2 additions and 2 deletions
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2
reactos/lib/fast486/common.c
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@ -834,7 +834,7 @@ Fast486TaskSwitch(PFAST486_STATE State, FAST486_TASK_SWITCH_TYPE Type, USHORT Se
}
/* Flush the TLB */
if (State->Tlb) RtlZeroMemory(State->Tlb, NUM_TLB_ENTRIES * sizeof(ULONG));
if (State->Tlb) RtlFillMemory(State->Tlb, NUM_TLB_ENTRIES * sizeof(ULONG), 0xFF);
/* Update the CPL */
if (NewTssLimit >= (sizeof(FAST486_TSS) - 1)) State->Cpl = GET_SEGMENT_RPL(NewTss.Cs);

2
reactos/lib/fast486/extraops.c
View file

@ -643,7 +643,7 @@ FAST486_OPCODE_HANDLER(Fast486ExtOpcodeLoadControlReg)
if (State->Tlb && (ModRegRm.Register == (INT)FAST486_REG_CR3))
{
/* Flush the TLB */
RtlZeroMemory(State->Tlb, NUM_TLB_ENTRIES * sizeof(ULONG));
RtlFillMemory(State->Tlb, NUM_TLB_ENTRIES * sizeof(ULONG), 0xFF);
}
/* Load a value to the control register */