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[BOOTVID] More improvements for PC-98 (#2936)
- Fix failure handling - Reduce memory mapping that's not needed
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e318801c1c
commit
06cbc2acd2
2 changed files with 28 additions and 11 deletions
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@ -11,8 +11,8 @@
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/* GLOBALS ********************************************************************/
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static ULONG_PTR VideoMemoryI;
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ULONG_PTR FrameBuffer;
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static ULONG_PTR PegcControl = 0;
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ULONG_PTR FrameBuffer = 0;
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#define PEGC_MAX_COLORS 256
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@ -25,23 +25,38 @@ GraphGetStatus(
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UCHAR Result;
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WRITE_PORT_UCHAR((PUCHAR)GRAPH_IO_o_STATUS_SELECT, Status);
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KeStallExecutionProcessor(1);
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Result = READ_PORT_UCHAR((PUCHAR)GRAPH_IO_i_STATUS);
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return (Result & GRAPH_STATUS_SET) && (Result != 0xFF);
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}
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static BOOLEAN
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TestMmio(VOID)
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{
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USHORT OldValue, NewValue;
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OldValue = READ_REGISTER_USHORT((PUSHORT)(PegcControl + PEGC_MMIO_MODE));
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/* Bits [15:1] are not writable */
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WRITE_REGISTER_USHORT((PUSHORT)(PegcControl + PEGC_MMIO_MODE), 0x80);
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NewValue = READ_REGISTER_USHORT((PUSHORT)(PegcControl + PEGC_MMIO_MODE));
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WRITE_REGISTER_USHORT((PUSHORT)(PegcControl + PEGC_MMIO_MODE), OldValue);
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return !(NewValue & 0x80);
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}
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static BOOLEAN
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HasPegcController(VOID)
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{
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BOOLEAN Success;
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if (GraphGetStatus(GRAPH_STATUS_PEGC))
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return TRUE;
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return TestMmio();
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WRITE_PORT_UCHAR((PUCHAR)GDC2_IO_o_MODE_FLIPFLOP2, GDC2_EGC_FF_UNPROTECT);
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WRITE_PORT_UCHAR((PUCHAR)GDC2_IO_o_MODE_FLIPFLOP2, GDC2_MODE_PEGC_ENABLE);
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Success = GraphGetStatus(GRAPH_STATUS_PEGC);
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Success = GraphGetStatus(GRAPH_STATUS_PEGC) ? TestMmio() : FALSE;
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WRITE_PORT_UCHAR((PUCHAR)GDC2_IO_o_MODE_FLIPFLOP2, GDC2_MODE_PEGC_DISABLE);
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WRITE_PORT_UCHAR((PUCHAR)GDC2_IO_o_MODE_FLIPFLOP2, GDC2_EGC_FF_PROTECT);
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@ -212,8 +227,8 @@ InitializeDisplay(VOID)
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WRITE_PORT_UCHAR((PUCHAR)GDC2_IO_o_MODE_FLIPFLOP2, GDC2_MODE_PEGC_ENABLE);
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WRITE_PORT_UCHAR((PUCHAR)GDC2_IO_o_MODE_FLIPFLOP2, GDC2_MODE_LINES_800);
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WRITE_PORT_UCHAR((PUCHAR)GDC2_IO_o_MODE_FLIPFLOP2, GDC2_EGC_FF_PROTECT);
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WRITE_REGISTER_USHORT((PUSHORT)(VideoMemoryI + PEGC_MMIO_MODE), PEGC_MODE_PACKED);
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WRITE_REGISTER_USHORT((PUSHORT)(VideoMemoryI + PEGC_MMIO_FRAMEBUFFER), PEGC_FB_MAP);
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WRITE_REGISTER_USHORT((PUSHORT)(PegcControl + PEGC_MMIO_MODE), PEGC_MODE_PACKED);
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WRITE_REGISTER_USHORT((PUSHORT)(PegcControl + PEGC_MMIO_FRAMEBUFFER), PEGC_FB_MAP);
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/* Select the video source */
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RelayState = READ_PORT_UCHAR((PUCHAR)GRAPH_IO_i_RELAY) & ~(GRAPH_RELAY_0 | GRAPH_RELAY_1);
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@ -348,8 +363,8 @@ VidInitialize(
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PHYSICAL_ADDRESS BaseAddress;
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BaseAddress.QuadPart = VRAM_NORMAL_PLANE_I;
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VideoMemoryI = (ULONG_PTR)MmMapIoSpace(BaseAddress, VRAM_PLANE_SIZE, MmNonCached);
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if (!VideoMemoryI)
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PegcControl = (ULONG_PTR)MmMapIoSpace(BaseAddress, PEGC_CONTROL_SIZE, MmNonCached);
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if (!PegcControl)
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goto Failure;
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if (!HasPegcController())
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@ -366,8 +381,8 @@ VidInitialize(
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return TRUE;
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Failure:
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if (!VideoMemoryI) MmUnmapIoSpace((PVOID)VideoMemoryI, VRAM_PLANE_SIZE);
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if (!FrameBuffer) MmUnmapIoSpace((PVOID)FrameBuffer, PEGC_FRAMEBUFFER_SIZE);
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if (PegcControl)
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MmUnmapIoSpace((PVOID)PegcControl, PEGC_CONTROL_SIZE);
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return FALSE;
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}
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@ -22,6 +22,8 @@
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#define PEGC_FRAMEBUFFER_PACKED 0xF00000
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#define PEGC_FRAMEBUFFER_SIZE 0x080000
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#define PEGC_CONTROL_SIZE 0x000200
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/* High-resolution machine */
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#define VRAM_HI_RESO_PLANE_B 0xC0000
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#define VRAM_HI_RESO_PLANE_G 0xC8000
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