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[BOOTVID] Simplify the code by introducing and using IO port helper macros.

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- Move around two header includes.
- Remove a redundant assignment in VgaInterpretCmdStream().
This commit is contained in:
Hermès Bélusca-Maïto 2019-06-23 02:29:01 +02:00
parent 0f3f8b2a35
commit 025cfb108b
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GPG key ID: 3B2539C65E7B93D0
3 changed files with 67 additions and 64 deletions
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83
drivers/base/bootvid/i386/bootvid.c
View file

@ -1,8 +1,5 @@
#include "precomp.h" #include "precomp.h"
#include <ntifs.h>
#include <ndk/halfuncs.h>
/* PRIVATE FUNCTIONS *********************************************************/ /* PRIVATE FUNCTIONS *********************************************************/
static BOOLEAN static BOOLEAN
@ -227,9 +224,6 @@ VgaInterpretCmdStream(IN PUSHORT CmdStream)
/* Unknown major function, fail */ /* Unknown major function, fail */
return FALSE; return FALSE;
} }
/* Get the next command */
Cmd = *CmdStream;
} }
/* If we got here, return success */ /* If we got here, return success */
@ -245,114 +239,115 @@ VgaIsPresent(VOID)
UCHAR i; UCHAR i;
/* Read the VGA Address Register */ /* Read the VGA Address Register */
VgaReg = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE); VgaReg = __inpb(0x3CE);
/* Select Read Map Select Register */ /* Select Read Map Select Register */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 4); __outpb(0x3CE, 4);
/* Read it back... it should be 4 */ /* Read it back... it should be 4 */
if (((READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE)) & 0xF) != 4) return FALSE; if ((__inpb(0x3CE) & 0xF) != 4)
return FALSE;
/* Read the VGA Data Register */ /* Read the VGA Data Register */
VgaReg2 = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF); VgaReg2 = __inpb(0x3CF);
/* Enable all planes */ /* Enable all planes */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 3); __outpb(0x3CF, 3);
/* Read it back... it should be 3 */ /* Read it back... it should be 3 */
if (READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF) != 0x3) if (__inpb(0x3CF) != 0x3)
{ {
/* Reset the registers and fail */ /* Reset the registers and fail */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0); __outpb(0x3CF, 0);
return FALSE; return FALSE;
} }
/* Select Bit Mask Register */ /* Select Bit Mask Register */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 8); __outpb(0x3CE, 8);
/* Read it back... it should be 8 */ /* Read it back... it should be 8 */
if (((READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE)) & 0xF) != 8) if ((__inpb(0x3CE) & 0xF) != 8)
{ {
/* Reset the registers and fail */ /* Reset the registers and fail */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 4); __outpb(0x3CE, 4);
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0); __outpb(0x3CF, 0);
return FALSE; return FALSE;
} }
/* Read the VGA Data Register */ /* Read the VGA Data Register */
VgaReg3 = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF); VgaReg3 = __inpb(0x3CF);
/* Loop bitmasks */ /* Loop bitmasks */
for (i = 0xBB; i; i >>= 1) for (i = 0xBB; i; i >>= 1)
{ {
/* Set bitmask */ /* Set bitmask */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, i); __outpb(0x3CF, i);
/* Read it back... it should be the same */ /* Read it back... it should be the same */
if (READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF) != i) if (__inpb(0x3CF) != i)
{ {
/* Reset the registers and fail */ /* Reset the registers and fail */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0xFF); __outpb(0x3CF, 0xFF);
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 4); __outpb(0x3CE, 4);
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0); __outpb(0x3CF, 0);
return FALSE; return FALSE;
} }
} }
/* Select Read Map Select Register */ /* Select Read Map Select Register */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 4); __outpb(0x3CE, 4);
/* Read it back... it should be 3 */ /* Read it back... it should be 3 */
if (READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF) != 3) if (__inpb(0x3CF) != 3)
{ {
/* Reset the registers and fail */ /* Reset the registers and fail */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0); __outpb(0x3CF, 0);
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 8); __outpb(0x3CE, 8);
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0xFF); __outpb(0x3CF, 0xFF);
return FALSE; return FALSE;
} }
/* Write the registers we read earlier */ /* Write the registers we read earlier */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, VgaReg2); __outpb(0x3CF, VgaReg2);
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 8); __outpb(0x3CE, 8);
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, VgaReg3); __outpb(0x3CF, VgaReg3);
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, VgaReg); __outpb(0x3CE, VgaReg);
/* Read sequencer address */ /* Read sequencer address */
SeqReg = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C4); SeqReg = __inpb(0x3C4);
/* Select memory mode register */ /* Select memory mode register */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C4, 4); __outpb(0x3C4, 4);
/* Read it back... it should still be 4 */ /* Read it back... it should still be 4 */
if (((READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C4)) & 7) != 4) if ((__inpb(0x3C4) & 7) != 4)
{ {
/* Fail */ /* Fail */
return FALSE; return FALSE;
} }
/* Read sequencer Data */ /* Read sequencer Data */
SeqReg2 = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5); SeqReg2 = __inpb(0x3C5);
/* Write null plane */ /* Write null plane */
WRITE_PORT_USHORT((PUSHORT)VgaRegisterBase + 0x3C4, 0x100); __outpw(0x3C4, 0x100);
/* Write sequencer flag */ /* Write sequencer flag */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5, SeqReg2 ^ 8); __outpb(0x3C5, SeqReg2 ^ 8);
/* Read it back */ /* Read it back */
if ((READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5)) != (SeqReg2 ^ 8)) if (__inpb(0x3C5) != (SeqReg2 ^ 8))
{ {
/* Not the same value... restore registers and fail */ /* Not the same value... restore registers and fail */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5, 2); __outpb(0x3C5, 2);
WRITE_PORT_USHORT((PUSHORT)VgaRegisterBase + 0x3C4, 0x300); __outpw(0x3C4, 0x300);
return FALSE; return FALSE;
} }
/* Now write the registers we read */ /* Now write the registers we read */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5, SeqReg2); __outpb(0x3C5, SeqReg2);
WRITE_PORT_USHORT((PUSHORT)VgaRegisterBase + 0x3C4, 0x300); __outpw(0x3C4, 0x300);
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C4, SeqReg); __outpb(0x3C4, SeqReg);
/* VGA is present! */ /* VGA is present! */
return TRUE; return TRUE;

12
drivers/base/bootvid/i386/vga.c
View file

@ -70,12 +70,6 @@ ULONG curr_y = 0;
static ULONG VidTextColor = 0xF; static ULONG VidTextColor = 0xF;
static BOOLEAN CarriageReturn = FALSE; static BOOLEAN CarriageReturn = FALSE;
#define __outpb(Port, Value) \
WRITE_PORT_UCHAR((PUCHAR)(VgaRegisterBase + (Port)), (UCHAR)(Value))
#define __outpw(Port, Value) \
WRITE_PORT_USHORT((PUSHORT)(VgaRegisterBase + (Port)), (USHORT)(Value))
/* PRIVATE FUNCTIONS *********************************************************/ /* PRIVATE FUNCTIONS *********************************************************/
static VOID static VOID
@ -88,7 +82,7 @@ ReadWriteMode(IN UCHAR Mode)
__outpb(0x3CE, 5); __outpb(0x3CE, 5);
/* Get the current register value, minus the current mode */ /* Get the current register value, minus the current mode */
Value = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF) & 0xF4; Value = __inpb(0x3CF) & 0xF4;
/* Set the new mode */ /* Set the new mode */
__outpb(0x3CF, Mode | Value); __outpb(0x3CF, Mode | Value);
@ -750,10 +744,10 @@ NTAPI
VidCleanUp(VOID) VidCleanUp(VOID)
{ {
/* Select bit mask register */ /* Select bit mask register */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 8); __outpb(0x3CE, 8);
/* Clear it */ /* Clear it */
WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 255); __outpb(0x3CF, 255);
} }
/* /*

16
drivers/base/bootvid/precomp.h
View file

@ -2,6 +2,8 @@
#define _BOOTVID_PCH_ #define _BOOTVID_PCH_
#include <ntddk.h> #include <ntddk.h>
#include <ntifs.h>
#include <ndk/halfuncs.h>
#include <drivers/bootvid/bootvid.h> #include <drivers/bootvid/bootvid.h>
/* Define if FontData has upside down characters */ /* Define if FontData has upside down characters */
@ -40,11 +42,23 @@ NTAPI
InitializePalette(VOID); InitializePalette(VOID);
/* Globals */ /* Globals */
extern USHORT AT_Initialization[];
extern ULONG curr_x; extern ULONG curr_x;
extern ULONG curr_y; extern ULONG curr_y;
extern ULONG_PTR VgaRegisterBase; extern ULONG_PTR VgaRegisterBase;
extern ULONG_PTR VgaBase; extern ULONG_PTR VgaBase;
extern USHORT AT_Initialization[];
extern UCHAR FontData[256 * BOOTCHAR_HEIGHT]; extern UCHAR FontData[256 * BOOTCHAR_HEIGHT];
#define __inpb(Port) \
READ_PORT_UCHAR((PUCHAR)(VgaRegisterBase + (Port)))
#define __inpw(Port) \
READ_PORT_USHORT((PUSHORT)(VgaRegisterBase + (Port)))
#define __outpb(Port, Value) \
WRITE_PORT_UCHAR((PUCHAR)(VgaRegisterBase + (Port)), (UCHAR)(Value))
#define __outpw(Port, Value) \
WRITE_PORT_USHORT((PUSHORT)(VgaRegisterBase + (Port)), (USHORT)(Value))
#endif /* _BOOTVID_PCH_ */ #endif /* _BOOTVID_PCH_ */