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https://github.com/reactos/reactos.git
synced 2024-06-22 22:11:39 +00:00
[FREELDR/HAL/NDK]
- Move some shared constants (HYPERSPACE_BASE, MM_HAL_VA_START, APIC_BASE) to NDK to avoid duplicating them, also fix wrong values for amd64 - Map the hal address space in amd64 freeldr - Fix use of uninitialized variable (HighPart of PHYSICAL_ADDRESS) in HalpAcpiCopyBiosTable - Fix some MSVC and amd64 warnings svn path=/trunk/; revision=53709
This commit is contained in:
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679d1e828c
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00502b9642
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@ -235,23 +235,31 @@ WinLdrpMapApic()
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BOOLEAN
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WinLdrMapSpecialPages()
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{
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/* Map the PCR page */
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if (!MempMapSinglePage(KIP0PCRADDRESS, PcrBasePage * PAGE_SIZE))
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{
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ERR("Could not map PCR @ %lx\n", PcrBasePage);
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return FALSE;
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}
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PHARDWARE_PTE PpeBase, PdeBase, PteBase;
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/* Map KI_USER_SHARED_DATA */
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if (!MempMapSinglePage(KI_USER_SHARED_DATA, (PcrBasePage+1) * PAGE_SIZE))
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{
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ERR("Could not map KI_USER_SHARED_DATA\n");
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return FALSE;
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}
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/* Map the PCR page */
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if (!MempMapSinglePage(KIP0PCRADDRESS, PcrBasePage * PAGE_SIZE))
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{
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ERR("Could not map PCR @ %lx\n", PcrBasePage);
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return FALSE;
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}
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/* Map KI_USER_SHARED_DATA */
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if (!MempMapSinglePage(KI_USER_SHARED_DATA, (PcrBasePage+1) * PAGE_SIZE))
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{
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ERR("Could not map KI_USER_SHARED_DATA\n");
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return FALSE;
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}
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/* Map the APIC page */
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WinLdrpMapApic();
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/* Map the page tables for 4 MB HAL address space. */
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PpeBase = MempGetOrCreatePageDir(PxeBase, VAtoPXI(MM_HAL_VA_START));
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PdeBase = MempGetOrCreatePageDir(PpeBase, VAtoPPI(MM_HAL_VA_START));
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MempGetOrCreatePageDir(PdeBase, VAtoPDI(MM_HAL_VA_START));
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MempGetOrCreatePageDir(PdeBase, VAtoPDI(MM_HAL_VA_START + 2 * 1024 * 1024));
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return TRUE;
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}
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@ -36,14 +36,6 @@
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#define VAtoPDI(va) ((((ULONG64)va) >> PDI_SHIFT) & 0x1FF)
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#define VAtoPTI(va) ((((ULONG64)va) >> PTI_SHIFT) & 0x1FF)
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#define HYPERSPACE_BASE 0xfffff70000000000ULL
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#define HAL_BASE 0xffffffff80000000ULL
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#define APIC_BASE 0xFFFFFFFFFFFE0000ULL
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#define APIC_PHYS_BASE 0xfee00000
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#define NUM_PAGES_KERNEL
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#ifndef ASM
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VOID FrLdrSetupGdtIdt(VOID);
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@ -40,8 +40,6 @@
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((p) >> PFN_SHIFT)
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#define STARTUP_BASE 0xC0000000
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#define HAL_BASE 0xFFC00000
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#define APIC_BASE 0xFFFE0000
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#define LowMemPageTableIndex 0
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#define StartupPageTableIndex (STARTUP_BASE >> 22)
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@ -100,11 +100,11 @@ HalpAcpiCopyBiosTable(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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{
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/* Phase 0: Convert to pages and use the HAL heap */
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PageCount = BYTES_TO_PAGES(Size);
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PhysAddress.LowPart = HalpAllocPhysicalMemory(LoaderBlock,
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0x1000000,
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PageCount,
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FALSE);
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if (PhysAddress.LowPart)
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PhysAddress.QuadPart = HalpAllocPhysicalMemory(LoaderBlock,
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0x1000000,
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PageCount,
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FALSE);
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if (PhysAddress.QuadPart)
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{
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/* Map it */
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CachedTable = HalpMapPhysicalMemory64(PhysAddress, PageCount);
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@ -217,7 +217,7 @@ HalpAcpiGetTableFromBios(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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}
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else
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{
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/* To find tables, we need the RSDT */
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/* To find tables, we need the RSDT */
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Rsdt = HalpAcpiGetTable(LoaderBlock, RSDT_SIGNATURE);
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if (Rsdt)
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{
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@ -342,7 +342,7 @@ HalpAcpiGetTableFromBios(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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ASSERT(Header);
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/* How many pages do we need? */
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PageCount = BYTES_TO_PAGES(Header->Length);
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PageCount = BYTES_TO_PAGES(Header->Length);
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if (PageCount != 2)
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{
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/* We assumed two, but this is not the case, free the current mapping */
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@ -546,7 +546,7 @@ HalpAcpiFindRsdtPhase0(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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PCONFIGURATION_COMPONENT_DATA Next = NULL;
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PCM_PARTIAL_RESOURCE_LIST ResourceList;
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PACPI_BIOS_MULTI_NODE NodeData;
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ULONG NodeLength;
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SIZE_T NodeLength;
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PFN_NUMBER PageCount;
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PVOID MappedAddress;
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PHYSICAL_ADDRESS PhysicalAddress;
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@ -605,12 +605,11 @@ HalpAcpiFindRsdtPhase0(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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PageCount = BYTES_TO_PAGES(NodeLength);
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/* Allocate the memory */
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PhysicalAddress.HighPart = 0;
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PhysicalAddress.LowPart = HalpAllocPhysicalMemory(LoaderBlock,
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0x1000000,
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PageCount,
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FALSE);
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if (PhysicalAddress.LowPart)
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PhysicalAddress.QuadPart = HalpAllocPhysicalMemory(LoaderBlock,
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0x1000000,
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PageCount,
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FALSE);
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if (PhysicalAddress.QuadPart)
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{
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/* Map it if the allocation worked */
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MappedAddress = HalpMapPhysicalMemory64(PhysicalAddress, PageCount);
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@ -741,7 +740,7 @@ HalpAcpiTableCacheInit(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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MmUnmapIoSpace(MappedAddress, TableLength << PAGE_SHIFT);
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}
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/* Cache the RSDT */
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/* Cache the RSDT */
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HalpAcpiCacheTable(&Rsdt->Header);
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/* Check for compatible loader block extension */
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@ -825,7 +824,7 @@ HalpSetupAcpiPhase0(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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HalpNumaInitializeStaticConfiguration(LoaderBlock);
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/* Initialize hotplug through the SRAT */
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HalpDynamicSystemResourceConfiguration(LoaderBlock);
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HalpDynamicSystemResourceConfiguration(LoaderBlock);
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DPRINT1("ACPI SRAT at 0x%p\n", HalpAcpiSrat);
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if (HalpAcpiSrat)
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{
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@ -843,14 +842,14 @@ HalpSetupAcpiPhase0(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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HaliAcpiTimerInit(0, 0);
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/* Do we have a low stub address yet? */
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if (!HalpLowStubPhysicalAddress.LowPart)
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if (!HalpLowStubPhysicalAddress.QuadPart)
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{
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/* Allocate it */
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HalpLowStubPhysicalAddress.LowPart = HalpAllocPhysicalMemory(LoaderBlock,
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0x100000,
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1,
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FALSE);
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if (HalpLowStubPhysicalAddress.LowPart)
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HalpLowStubPhysicalAddress.QuadPart = HalpAllocPhysicalMemory(LoaderBlock,
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0x100000,
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1,
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FALSE);
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if (HalpLowStubPhysicalAddress.QuadPart)
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{
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/* Map it */
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HalpLowStub = HalpMapPhysicalMemory64(HalpLowStubPhysicalAddress, 1);
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@ -1,7 +1,6 @@
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#ifdef _M_AMD64
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#define APIC_BASE 0xFFFFFFFFFEE00000ULL
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#define IOAPIC_BASE 0xFFFFFFFFFEE01000ULL // checkme
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#define IOAPIC_BASE 0xFFFFFFFFFFFE1000ULL // checkme
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#define ZERO_VECTOR 0x00 // IRQL 00
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#define APC_VECTOR 0x3D // IRQL 01
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#define APIC_SPURIOUS_VECTOR 0x3f
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#define TprToIrql(Tpr) ((KIRQL)(Tpr >> 4))
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#define CLOCK2_LEVEL CLOCK_LEVEL
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#else
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#define APIC_BASE 0xFFFE0000
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#define IOAPIC_BASE 0xFFFE1000 // checkme
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#define ZERO_VECTOR 0x00 // IRQL 00
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#define APIC_SPURIOUS_VECTOR 0x1f
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@ -34,7 +34,7 @@ HackEoi:
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push rax
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lea rax, HackEoiReturn[rip]
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push rax
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mov dword ptr [HEX(0FFFFFFFFFEE000B0)], 0
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mov dword ptr [HEX(0FFFFFFFFFFFE00B0)], 0
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iretq
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HackEoiReturn:
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ret
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@ -13,8 +13,7 @@
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#include <debug.h>
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/* Share with Mm headers? */
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#define MM_HAL_VA_START (PVOID)0xFFC00000
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#define MM_HAL_HEAP_START (PVOID)((ULONG_PTR)MM_HAL_VA_START + (1024 * 1024))
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#define MM_HAL_HEAP_START (PVOID)(MM_HAL_VA_START + (1024 * 1024))
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/* GLOBALS *******************************************************************/
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/* PRIVATE FUNCTIONS *********************************************************/
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ULONG
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ULONG_PTR
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NTAPI
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HalpAllocPhysicalMemory(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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IN ULONG MaxAddress,
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IN ULONG PageCount,
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IN ULONG_PTR MaxAddress,
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IN PFN_NUMBER PageCount,
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IN BOOLEAN Aligned)
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{
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ULONG UsedDescriptors, Alignment, PhysicalAddress;
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ULONG UsedDescriptors, Alignment;
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ULONG_PTR PhysicalAddress;
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PFN_NUMBER MaxPage, BasePage;
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PLIST_ENTRY NextEntry;
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PMEMORY_ALLOCATION_DESCRIPTOR MdBlock, NewBlock, FreeBlock;
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/* Okay, now get a descriptor */
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NewBlock = &HalpAllocationDescriptorArray[HalpUsedAllocDescriptors];
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NewBlock->PageCount = PageCount;
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NewBlock->PageCount = (ULONG)PageCount;
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NewBlock->BasePage = MdBlock->BasePage + Alignment;
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NewBlock->MemoryType = LoaderHALCachedMemory;
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{
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/* Get the next descriptor */
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FreeBlock = &HalpAllocationDescriptorArray[UsedDescriptors];
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FreeBlock->PageCount = MdBlock->PageCount - Alignment - PageCount;
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FreeBlock->BasePage = MdBlock->BasePage + Alignment + PageCount;
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FreeBlock->PageCount = MdBlock->PageCount - Alignment - (ULONG)PageCount;
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FreeBlock->BasePage = MdBlock->BasePage + Alignment + (ULONG)PageCount;
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/* One more */
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HalpUsedAllocDescriptors++;
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else
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{
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/* Consume memory from this block */
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MdBlock->BasePage += PageCount;
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MdBlock->PageCount -= PageCount;
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MdBlock->BasePage += (ULONG)PageCount;
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MdBlock->PageCount -= (ULONG)PageCount;
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/* Insert the descriptor */
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InsertTailList(&MdBlock->ListEntry, &NewBlock->ListEntry);
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PVOID
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NTAPI
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HalpMapPhysicalMemory64(IN PHYSICAL_ADDRESS PhysicalAddress,
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IN ULONG PageCount)
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IN PFN_NUMBER PageCount)
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{
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PHARDWARE_PTE PointerPte;
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ULONG UsedPages = 0;
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PFN_NUMBER UsedPages = 0;
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PVOID VirtualAddress, BaseAddress;
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/* Start at the current HAL heap base */
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VOID
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NTAPI
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HalpUnmapVirtualAddress(IN PVOID VirtualAddress,
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IN ULONG PageCount)
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IN PFN_NUMBER PageCount)
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{
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PHARDWARE_PTE PointerPte;
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ULONG i;
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/* Only accept valid addresses */
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if (VirtualAddress < MM_HAL_VA_START) return;
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if (VirtualAddress < (PVOID)MM_HAL_VA_START) return;
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/* Align it down to page size */
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VirtualAddress = (PVOID)((ULONG_PTR)VirtualAddress & ~(PAGE_SIZE - 1));
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@ -639,18 +639,27 @@ HalpReleasePciDeviceForDebugging(
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//
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// Memory routines
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//
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ULONG_PTR
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NTAPI
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HalpAllocPhysicalMemory(
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IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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IN ULONG_PTR MaxAddress,
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IN PFN_NUMBER PageCount,
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IN BOOLEAN Aligned
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);
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PVOID
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NTAPI
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HalpMapPhysicalMemory64(
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IN PHYSICAL_ADDRESS PhysicalAddress,
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IN ULONG NumberPage
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IN PFN_NUMBER PageCount
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);
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VOID
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NTAPI
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HalpUnmapVirtualAddress(
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IN PVOID VirtualAddress,
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IN ULONG NumberPages
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IN PFN_NUMBER NumberPages
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);
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/* sysinfo.c */
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VOID
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);
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ULONG
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NTAPI
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HalpAllocPhysicalMemory(
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IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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IN ULONG MaxAddress,
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IN ULONG PageCount,
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IN BOOLEAN Aligned
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);
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PVOID
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NTAPI
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HalpMapPhysicalMemory64(
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IN PHYSICAL_ADDRESS PhysicalAddress,
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IN ULONG PageCount
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);
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NTSTATUS
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NTAPI
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HalpOpenRegistryKey(
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@ -852,8 +845,8 @@ HalpInitProcessor(
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#ifdef _M_AMD64
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#define KfLowerIrql KeLowerIrql
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#define KiEnterInterruptTrap(TrapFrame) /* We do all neccessary in asm code */
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#define KiEoiHelper() return
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#define HalBeginSystemInterrupt(Irql, Vector, OldIrql) TRUE
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#define KiEoiHelper(TrapFrame) return /* Just return to the caller */
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#define HalBeginSystemInterrupt(Irql, Vector, OldIrql) (KeRaiseIrql(Irql, OldIrql), TRUE)
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#ifndef CONFIG_SMP
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/* On UP builds, spinlocks don't exist at IRQL >= DISPATCH */
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#define KiAcquireSpinLock(SpinLock)
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@ -162,6 +162,9 @@ Author:
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// HAL Variables
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//
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#define INITIAL_STALL_COUNT 100
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#define HYPERSPACE_BASE 0xfffff70000000000ULL
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#define MM_HAL_VA_START 0xFFFFFFFFFFC00000ULL /* This is Vista+ */
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#define APIC_BASE 0xFFFFFFFFFFFE0000ULL
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//
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// IOPM Definitions
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@ -136,6 +136,13 @@ Author:
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// HAL Variables
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//
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#define INITIAL_STALL_COUNT 100
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#ifdef PAE
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#define HYPERSPACE_BASE 0xc0400000
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#else
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#define HYPERSPACE_BASE 0xc0800000
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#endif
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#define MM_HAL_VA_START 0xFFC00000
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#define APIC_BASE 0xFFFE0000
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//
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// IOPM Definitions
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