2010-04-01 19:07:40 +00:00
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/*
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* PROJECT: ReactOS PCI Bus Driver
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* LICENSE: BSD - See COPYING.ARM in the top level directory
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* FILE: drivers/bus/pci/debug.c
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* PURPOSE: Debug Helpers
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* PROGRAMMERS: ReactOS Portable Systems Group
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*/
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/* INCLUDES *******************************************************************/
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#include <pci.h>
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2014-01-04 12:05:02 +00:00
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2010-04-01 19:07:40 +00:00
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#define NDEBUG
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#include <debug.h>
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/* GLOBALS ********************************************************************/
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2010-06-30 01:39:21 +00:00
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PCHAR PnpCodes[] =
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{
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"START_DEVICE",
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"QUERY_REMOVE_DEVICE",
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"REMOVE_DEVICE",
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"CANCEL_REMOVE_DEVICE",
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"STOP_DEVICE",
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"QUERY_STOP_DEVICE",
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"CANCEL_STOP_DEVICE",
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"QUERY_DEVICE_RELATIONS",
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"QUERY_INTERFACE",
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"QUERY_CAPABILITIES",
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"QUERY_RESOURCES",
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"QUERY_RESOURCE_REQUIREMENTS",
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"QUERY_DEVICE_TEXT",
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"FILTER_RESOURCE_REQUIREMENTS",
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"** UNKNOWN PNP IRP Minor Code **",
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"READ_CONFIG",
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"WRITE_CONFIG",
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"EJECT",
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"SET_LOCK",
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"QUERY_ID",
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"QUERY_PNP_DEVICE_STATE",
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"QUERY_BUS_INFORMATION",
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"DEVICE_USAGE_NOTIFICATION"
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};
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PCHAR PoCodes[] =
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{
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"WAIT_WAKE",
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"POWER_SEQUENCE",
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"SET_POWER",
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"QUERY_POWER",
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};
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- Add support for PnP IRP to PDO: IRP_MN_QUERY_BUS_INFORMATION (PciQueryBusInformation), IRP_MN_QUERY_ID (PciQueryId), IRP_MN_QUERY_DEVICE_TEXT (PciQueryDeviceText), IRP_MN_QUERY_CAPABILITIES (PciQueryCapabilities), IRP_MN_QUERY_DEVICE_RELATIONS (PciQueryTargetDeviceRelations implement, PciQueryEjectionRelations, stub)
- Stub support for PnP IRP to PDO: IRP_MN_QUERY_RESOURCE_REQUIREMENTS (PciQueryRequirements), IRP_MN_QUERY_RESOURCES(PciQueryResources)
- Add support for PnP IRP to FDO: IRP_MN_QUERY_CAPABILITIES (handle in PciFdoIrpQueryDeviceCapabilities)
- Build device capability UI number (PciDetermineSlotNumber), use PIR$ (seem support broken, need to check loader) or device property for bus not root
- Use parent attachee device and this PDO for build device/system wake states, latency, device/system power mappings
- PCI-ID manage support: PciInitIdBuffer, PciIdPrintf, PciIdPrintfAppend
- Debug helper: PciDebugDumpQueryCapabilities
- Thanks richard for advise + beer
PCI-X driver now pass 10000 codes lines!
svn path=/trunk/; revision=48548
2010-08-14 17:09:20 +00:00
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PCHAR SystemPowerStates[] =
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{
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"Unspecified",
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"Working",
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"Sleeping1",
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"Sleeping2",
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"Sleeping3",
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"Hibernate",
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"Shutdown"
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};
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PCHAR DevicePowerStates[] =
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{
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"Unspecified",
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"D0",
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"D1",
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"D2",
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"D3"
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};
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2010-06-30 01:39:21 +00:00
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ULONG PciBreakOnPdoPowerIrp, PciBreakOnFdoPowerIrp;
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ULONG PciBreakOnPdoPnpIrp, PciBreakOnFdoPnpIrp;
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2010-04-01 19:07:40 +00:00
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/* FUNCTIONS ******************************************************************/
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2010-06-30 01:39:21 +00:00
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PCHAR
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NTAPI
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PciDebugPnpIrpTypeToText(IN USHORT MinorFunction)
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{
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PCHAR Text;
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/* Catch invalid code */
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if (MinorFunction >= IRP_MN_SURPRISE_REMOVAL)
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{
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/* New version of Windows? Or driver bug */
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Text = "** UNKNOWN PNP IRP Minor Code **";
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}
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else
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{
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/* Get the right text for it */
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Text = PnpCodes[MinorFunction];
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}
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/* Return the symbolic name for the IRP */
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return Text;
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}
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PCHAR
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NTAPI
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PciDebugPoIrpTypeToText(IN USHORT MinorFunction)
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{
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PCHAR Text;
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/* Catch invalid code */
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if (MinorFunction >= IRP_MN_QUERY_POWER)
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{
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/* New version of Windows? Or driver bug */
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Text = "** UNKNOWN PO IRP Minor Code **";
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}
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else
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{
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/* Get the right text for it */
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Text = PoCodes[MinorFunction];
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}
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/* Return the symbolic name for the IRP */
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return Text;
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}
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BOOLEAN
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NTAPI
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PciDebugIrpDispatchDisplay(IN PIO_STACK_LOCATION IoStackLocation,
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IN PPCI_FDO_EXTENSION DeviceExtension,
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IN USHORT MaxMinor)
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{
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2010-07-17 01:31:26 +00:00
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PPCI_PDO_EXTENSION PdoDeviceExtension;
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2011-09-11 00:40:20 +00:00
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ULONG BreakMask;
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//ULONG DebugLevel = 0;
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2010-06-30 01:39:21 +00:00
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PCHAR IrpString;
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/* Only two functions are recognized */
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switch (IoStackLocation->MajorFunction)
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{
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case IRP_MJ_POWER:
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/* Get the string and the correct break mask for the extension */
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BreakMask = (DeviceExtension->ExtensionType == PciPdoExtensionType) ?
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PciBreakOnPdoPowerIrp : PciBreakOnFdoPowerIrp;
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IrpString = PciDebugPoIrpTypeToText(IoStackLocation->MinorFunction);
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break;
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case IRP_MJ_PNP:
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/* Get the string and the correct break mask for the extension */
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BreakMask = (DeviceExtension->ExtensionType == PciFdoExtensionType) ?
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PciBreakOnPdoPnpIrp : PciBreakOnFdoPnpIrp;
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IrpString = PciDebugPnpIrpTypeToText(IoStackLocation->MinorFunction);
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break;
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default:
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/* Other functions are not decoded */
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BreakMask = FALSE;
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IrpString = "";
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break;
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}
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/* Check if this is a PDO */
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if (DeviceExtension->ExtensionType == PciPdoExtensionType)
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{
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/* Choose the correct debug level based on which function this is */
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if (IoStackLocation->MajorFunction == IRP_MJ_POWER)
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{
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2011-09-11 00:40:20 +00:00
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//DebugLevel = 0x500;
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2010-06-30 01:39:21 +00:00
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}
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else if (IoStackLocation->MajorFunction == IRP_MJ_PNP)
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{
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2011-09-11 00:40:20 +00:00
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//DebugLevel = 0x200;
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2010-06-30 01:39:21 +00:00
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}
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2010-07-17 01:31:26 +00:00
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2010-06-30 01:39:21 +00:00
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/* For a PDO, print out the bus, device, and function number */
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PdoDeviceExtension = (PVOID)DeviceExtension;
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DPRINT1("PDO(b=0x%x, d=0x%x, f=0x%x)<-%s\n",
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PdoDeviceExtension->ParentFdoExtension->BaseBus,
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PdoDeviceExtension->Slot.u.bits.DeviceNumber,
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PdoDeviceExtension->Slot.u.bits.FunctionNumber,
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IrpString);
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}
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else if (DeviceExtension->ExtensionType == PciFdoExtensionType)
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{
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/* Choose the correct debug level based on which function this is */
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if (IoStackLocation->MajorFunction == IRP_MJ_POWER)
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{
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2011-09-11 00:44:13 +00:00
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//DebugLevel = 0x400;
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2010-06-30 01:39:21 +00:00
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}
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else if (IoStackLocation->MajorFunction == IRP_MJ_PNP)
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{
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2011-09-11 00:44:13 +00:00
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//DebugLevel = 0x100;
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2010-06-30 01:39:21 +00:00
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}
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/* For an FDO, just dump the extension pointer and IRP string */
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2013-05-10 10:22:01 +00:00
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DPRINT1("FDO(%p)<-%s\n", DeviceExtension, IrpString);
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2010-06-30 01:39:21 +00:00
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}
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/* If the function is illegal for this extension, complain */
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if (IoStackLocation->MinorFunction > MaxMinor)
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DPRINT1("Unknown IRP, minor = 0x%x\n", IoStackLocation->MinorFunction);
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/* Return whether or not the debugger should be broken into for this IRP */
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return ((1 << IoStackLocation->MinorFunction) & BreakMask);
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}
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2010-07-17 01:31:26 +00:00
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VOID
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NTAPI
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PciDebugDumpCommonConfig(IN PPCI_COMMON_HEADER PciData)
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{
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USHORT i;
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/* Loop the PCI header */
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for (i = 0; i < PCI_COMMON_HDR_LENGTH; i += 4)
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{
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/* Dump each DWORD and its offset */
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DPRINT1(" %02x - %08x\n", i, *(PULONG)((ULONG_PTR)PciData + i));
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}
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}
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- Add support for PnP IRP to PDO: IRP_MN_QUERY_BUS_INFORMATION (PciQueryBusInformation), IRP_MN_QUERY_ID (PciQueryId), IRP_MN_QUERY_DEVICE_TEXT (PciQueryDeviceText), IRP_MN_QUERY_CAPABILITIES (PciQueryCapabilities), IRP_MN_QUERY_DEVICE_RELATIONS (PciQueryTargetDeviceRelations implement, PciQueryEjectionRelations, stub)
- Stub support for PnP IRP to PDO: IRP_MN_QUERY_RESOURCE_REQUIREMENTS (PciQueryRequirements), IRP_MN_QUERY_RESOURCES(PciQueryResources)
- Add support for PnP IRP to FDO: IRP_MN_QUERY_CAPABILITIES (handle in PciFdoIrpQueryDeviceCapabilities)
- Build device capability UI number (PciDetermineSlotNumber), use PIR$ (seem support broken, need to check loader) or device property for bus not root
- Use parent attachee device and this PDO for build device/system wake states, latency, device/system power mappings
- PCI-ID manage support: PciInitIdBuffer, PciIdPrintf, PciIdPrintfAppend
- Debug helper: PciDebugDumpQueryCapabilities
- Thanks richard for advise + beer
PCI-X driver now pass 10000 codes lines!
svn path=/trunk/; revision=48548
2010-08-14 17:09:20 +00:00
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VOID
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NTAPI
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PciDebugDumpQueryCapabilities(IN PDEVICE_CAPABILITIES DeviceCaps)
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{
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ULONG i;
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/* Dump the capabilities */
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2013-05-10 10:22:01 +00:00
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DPRINT1("Capabilities\n Lock:%u, Eject:%u, Remove:%u, Dock:%u, UniqueId:%u\n",
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- Add support for PnP IRP to PDO: IRP_MN_QUERY_BUS_INFORMATION (PciQueryBusInformation), IRP_MN_QUERY_ID (PciQueryId), IRP_MN_QUERY_DEVICE_TEXT (PciQueryDeviceText), IRP_MN_QUERY_CAPABILITIES (PciQueryCapabilities), IRP_MN_QUERY_DEVICE_RELATIONS (PciQueryTargetDeviceRelations implement, PciQueryEjectionRelations, stub)
- Stub support for PnP IRP to PDO: IRP_MN_QUERY_RESOURCE_REQUIREMENTS (PciQueryRequirements), IRP_MN_QUERY_RESOURCES(PciQueryResources)
- Add support for PnP IRP to FDO: IRP_MN_QUERY_CAPABILITIES (handle in PciFdoIrpQueryDeviceCapabilities)
- Build device capability UI number (PciDetermineSlotNumber), use PIR$ (seem support broken, need to check loader) or device property for bus not root
- Use parent attachee device and this PDO for build device/system wake states, latency, device/system power mappings
- PCI-ID manage support: PciInitIdBuffer, PciIdPrintf, PciIdPrintfAppend
- Debug helper: PciDebugDumpQueryCapabilities
- Thanks richard for advise + beer
PCI-X driver now pass 10000 codes lines!
svn path=/trunk/; revision=48548
2010-08-14 17:09:20 +00:00
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DeviceCaps->LockSupported,
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DeviceCaps->EjectSupported,
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DeviceCaps->Removable,
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DeviceCaps->DockDevice,
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DeviceCaps->UniqueID);
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2013-05-10 10:22:01 +00:00
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DbgPrint(" SilentInstall:%u, RawOk:%u, SurpriseOk:%u\n",
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- Add support for PnP IRP to PDO: IRP_MN_QUERY_BUS_INFORMATION (PciQueryBusInformation), IRP_MN_QUERY_ID (PciQueryId), IRP_MN_QUERY_DEVICE_TEXT (PciQueryDeviceText), IRP_MN_QUERY_CAPABILITIES (PciQueryCapabilities), IRP_MN_QUERY_DEVICE_RELATIONS (PciQueryTargetDeviceRelations implement, PciQueryEjectionRelations, stub)
- Stub support for PnP IRP to PDO: IRP_MN_QUERY_RESOURCE_REQUIREMENTS (PciQueryRequirements), IRP_MN_QUERY_RESOURCES(PciQueryResources)
- Add support for PnP IRP to FDO: IRP_MN_QUERY_CAPABILITIES (handle in PciFdoIrpQueryDeviceCapabilities)
- Build device capability UI number (PciDetermineSlotNumber), use PIR$ (seem support broken, need to check loader) or device property for bus not root
- Use parent attachee device and this PDO for build device/system wake states, latency, device/system power mappings
- PCI-ID manage support: PciInitIdBuffer, PciIdPrintf, PciIdPrintfAppend
- Debug helper: PciDebugDumpQueryCapabilities
- Thanks richard for advise + beer
PCI-X driver now pass 10000 codes lines!
svn path=/trunk/; revision=48548
2010-08-14 17:09:20 +00:00
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DeviceCaps->SilentInstall,
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DeviceCaps->RawDeviceOK,
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DeviceCaps->SurpriseRemovalOK);
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2013-05-10 10:22:01 +00:00
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DbgPrint(" Address %08x, UINumber %08x, Latencies D1 %u, D2 %u, D3 %u\n",
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- Add support for PnP IRP to PDO: IRP_MN_QUERY_BUS_INFORMATION (PciQueryBusInformation), IRP_MN_QUERY_ID (PciQueryId), IRP_MN_QUERY_DEVICE_TEXT (PciQueryDeviceText), IRP_MN_QUERY_CAPABILITIES (PciQueryCapabilities), IRP_MN_QUERY_DEVICE_RELATIONS (PciQueryTargetDeviceRelations implement, PciQueryEjectionRelations, stub)
- Stub support for PnP IRP to PDO: IRP_MN_QUERY_RESOURCE_REQUIREMENTS (PciQueryRequirements), IRP_MN_QUERY_RESOURCES(PciQueryResources)
- Add support for PnP IRP to FDO: IRP_MN_QUERY_CAPABILITIES (handle in PciFdoIrpQueryDeviceCapabilities)
- Build device capability UI number (PciDetermineSlotNumber), use PIR$ (seem support broken, need to check loader) or device property for bus not root
- Use parent attachee device and this PDO for build device/system wake states, latency, device/system power mappings
- PCI-ID manage support: PciInitIdBuffer, PciIdPrintf, PciIdPrintfAppend
- Debug helper: PciDebugDumpQueryCapabilities
- Thanks richard for advise + beer
PCI-X driver now pass 10000 codes lines!
svn path=/trunk/; revision=48548
2010-08-14 17:09:20 +00:00
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DeviceCaps->Address,
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DeviceCaps->UINumber,
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DeviceCaps->D1Latency,
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DeviceCaps->D2Latency,
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DeviceCaps->D3Latency);
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/* Dump and convert the wake levels */
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DbgPrint(" System Wake: %s, Device Wake: %s\n DeviceState[PowerState] [",
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SystemPowerStates[min(DeviceCaps->SystemWake, PowerSystemMaximum)],
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DevicePowerStates[min(DeviceCaps->DeviceWake, PowerDeviceMaximum)]);
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/* Dump and convert the power state mappings */
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for (i = PowerSystemWorking; i < PowerSystemMaximum; i++)
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DbgPrint(" %s", DevicePowerStates[DeviceCaps->DeviceState[i]]);
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2010-08-14 18:06:19 +00:00
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- Add support for PnP IRP to PDO: IRP_MN_QUERY_BUS_INFORMATION (PciQueryBusInformation), IRP_MN_QUERY_ID (PciQueryId), IRP_MN_QUERY_DEVICE_TEXT (PciQueryDeviceText), IRP_MN_QUERY_CAPABILITIES (PciQueryCapabilities), IRP_MN_QUERY_DEVICE_RELATIONS (PciQueryTargetDeviceRelations implement, PciQueryEjectionRelations, stub)
- Stub support for PnP IRP to PDO: IRP_MN_QUERY_RESOURCE_REQUIREMENTS (PciQueryRequirements), IRP_MN_QUERY_RESOURCES(PciQueryResources)
- Add support for PnP IRP to FDO: IRP_MN_QUERY_CAPABILITIES (handle in PciFdoIrpQueryDeviceCapabilities)
- Build device capability UI number (PciDetermineSlotNumber), use PIR$ (seem support broken, need to check loader) or device property for bus not root
- Use parent attachee device and this PDO for build device/system wake states, latency, device/system power mappings
- PCI-ID manage support: PciInitIdBuffer, PciIdPrintf, PciIdPrintfAppend
- Debug helper: PciDebugDumpQueryCapabilities
- Thanks richard for advise + beer
PCI-X driver now pass 10000 codes lines!
svn path=/trunk/; revision=48548
2010-08-14 17:09:20 +00:00
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/* Finish the dump */
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DbgPrint(" ]\n");
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}
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2010-08-14 18:06:19 +00:00
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PCHAR
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NTAPI
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PciDebugCmResourceTypeToText(IN UCHAR Type)
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{
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/* What kind of resource it this? */
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switch (Type)
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{
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/* Pick the correct identifier string based on the type */
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case CmResourceTypeDeviceSpecific: return "CmResourceTypeDeviceSpecific";
|
|
|
|
case CmResourceTypePort: return "CmResourceTypePort";
|
|
|
|
case CmResourceTypeInterrupt: return "CmResourceTypeInterrupt";
|
|
|
|
case CmResourceTypeMemory: return "CmResourceTypeMemory";
|
|
|
|
case CmResourceTypeDma: return "CmResourceTypeDma";
|
|
|
|
case CmResourceTypeBusNumber: return "CmResourceTypeBusNumber";
|
|
|
|
case CmResourceTypeConfigData: return "CmResourceTypeConfigData";
|
|
|
|
case CmResourceTypeDevicePrivate: return "CmResourceTypeDevicePrivate";
|
|
|
|
case CmResourceTypePcCardConfig: return "CmResourceTypePcCardConfig";
|
|
|
|
default: return "*** INVALID RESOURCE TYPE ***";
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
VOID
|
|
|
|
NTAPI
|
|
|
|
PciDebugPrintIoResource(IN PIO_RESOURCE_DESCRIPTOR Descriptor)
|
|
|
|
{
|
|
|
|
ULONG i;
|
|
|
|
PULONG Data;
|
|
|
|
|
|
|
|
/* Print out the header */
|
2013-05-10 10:22:01 +00:00
|
|
|
DPRINT1(" IoResource Descriptor dump: Descriptor @0x%p\n", Descriptor);
|
2010-08-14 18:06:19 +00:00
|
|
|
DPRINT1(" Option = 0x%x\n", Descriptor->Option);
|
2013-05-10 10:22:01 +00:00
|
|
|
DPRINT1(" Type = %u (%s)\n", Descriptor->Type, PciDebugCmResourceTypeToText(Descriptor->Type));
|
|
|
|
DPRINT1(" ShareDisposition = %u\n", Descriptor->ShareDisposition);
|
2010-08-14 18:06:19 +00:00
|
|
|
DPRINT1(" Flags = 0x%04X\n", Descriptor->Flags);
|
|
|
|
|
|
|
|
/* Loop private data */
|
|
|
|
Data = (PULONG)&Descriptor->u.DevicePrivate;
|
|
|
|
for (i = 0; i < 6; i += 3)
|
|
|
|
{
|
|
|
|
/* Dump it in 32-bit triplets */
|
2013-05-10 10:22:01 +00:00
|
|
|
DPRINT1(" Data[%u] = %08x %08x %08x\n", i, Data[0], Data[1], Data[2]);
|
2010-08-14 18:06:19 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
VOID
|
|
|
|
NTAPI
|
|
|
|
PciDebugPrintIoResReqList(IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements)
|
|
|
|
{
|
|
|
|
ULONG AlternativeLists;
|
|
|
|
PIO_RESOURCE_LIST List;
|
|
|
|
ULONG Count;
|
|
|
|
PIO_RESOURCE_DESCRIPTOR Descriptor;
|
|
|
|
|
|
|
|
/* Make sure there's a list */
|
|
|
|
if (!Requirements) return;
|
|
|
|
|
|
|
|
/* Grab the main list and the alternates as well */
|
|
|
|
AlternativeLists = Requirements->AlternativeLists;
|
|
|
|
List = Requirements->List;
|
|
|
|
|
|
|
|
/* Print out the initial header*/
|
|
|
|
DPRINT1(" IO_RESOURCE_REQUIREMENTS_LIST (PCI Bus Driver)\n");
|
|
|
|
DPRINT1(" InterfaceType %d\n", Requirements->InterfaceType);
|
|
|
|
DPRINT1(" BusNumber 0x%x\n", Requirements->BusNumber);
|
|
|
|
DPRINT1(" SlotNumber %d (0x%x), (d/f = 0x%x/0x%x)\n",
|
|
|
|
Requirements->SlotNumber,
|
|
|
|
Requirements->SlotNumber,
|
|
|
|
((PCI_SLOT_NUMBER*)&Requirements->SlotNumber)->u.bits.DeviceNumber,
|
|
|
|
((PCI_SLOT_NUMBER*)&Requirements->SlotNumber)->u.bits.FunctionNumber);
|
2013-05-10 10:22:01 +00:00
|
|
|
DPRINT1(" AlternativeLists %u\n", AlternativeLists);
|
2010-08-14 18:06:19 +00:00
|
|
|
|
|
|
|
/* Scan alternative lists */
|
|
|
|
while (AlternativeLists--)
|
|
|
|
{
|
|
|
|
/* Get the descriptor array, and the count of descriptors */
|
|
|
|
Descriptor = List->Descriptors;
|
|
|
|
Count = List->Count;
|
|
|
|
|
|
|
|
/* Print out each descriptor */
|
2013-05-10 10:22:01 +00:00
|
|
|
DPRINT1("\n List[%u].Count = %u\n", AlternativeLists, Count);
|
2010-08-14 18:06:19 +00:00
|
|
|
while (Count--) PciDebugPrintIoResource(Descriptor++);
|
|
|
|
|
|
|
|
/* Should've reached a new list now */
|
|
|
|
List = (PIO_RESOURCE_LIST)Descriptor;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Terminate the dump */
|
|
|
|
DPRINT1("\n");
|
|
|
|
}
|
|
|
|
|
2010-09-12 06:03:12 +00:00
|
|
|
VOID
|
|
|
|
NTAPI
|
|
|
|
PciDebugPrintPartialResource(IN PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialResource)
|
|
|
|
{
|
|
|
|
/* Dump all the data in the partial */
|
2013-05-10 10:22:01 +00:00
|
|
|
DPRINT1(" Partial Resource Descriptor @0x%p\n", PartialResource);
|
|
|
|
DPRINT1(" Type = %u (%s)\n", PartialResource->Type, PciDebugCmResourceTypeToText(PartialResource->Type));
|
|
|
|
DPRINT1(" ShareDisposition = %u\n", PartialResource->ShareDisposition);
|
2010-09-12 06:03:12 +00:00
|
|
|
DPRINT1(" Flags = 0x%04X\n", PartialResource->Flags);
|
|
|
|
DPRINT1(" Data[%d] = %08x %08x %08x\n",
|
|
|
|
0,
|
|
|
|
PartialResource->u.Generic.Start.LowPart,
|
|
|
|
PartialResource->u.Generic.Start.HighPart,
|
|
|
|
PartialResource->u.Generic.Length);
|
|
|
|
}
|
|
|
|
|
|
|
|
VOID
|
|
|
|
NTAPI
|
|
|
|
PciDebugPrintCmResList(IN PCM_RESOURCE_LIST PartialList)
|
|
|
|
{
|
|
|
|
PCM_FULL_RESOURCE_DESCRIPTOR FullDescriptor;
|
|
|
|
PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptor;
|
|
|
|
ULONG Count, i, ListCount;
|
|
|
|
|
|
|
|
/* Make sure there's something to dump */
|
|
|
|
if (!PartialList) return;
|
|
|
|
|
|
|
|
/* Get the full list count */
|
|
|
|
ListCount = PartialList->Count;
|
|
|
|
FullDescriptor = PartialList->List;
|
2013-05-10 10:22:01 +00:00
|
|
|
DPRINT1(" CM_RESOURCE_LIST (PCI Bus Driver) (List Count = %u)\n", PartialList->Count);
|
2021-06-11 12:29:21 +00:00
|
|
|
|
2010-09-12 06:03:12 +00:00
|
|
|
/* Loop full list */
|
|
|
|
for (i = 0; i < ListCount; i++)
|
|
|
|
{
|
|
|
|
/* Loop full descriptor */
|
|
|
|
DPRINT1(" InterfaceType %d\n", FullDescriptor->InterfaceType);
|
|
|
|
DPRINT1(" BusNumber 0x%x\n", FullDescriptor->BusNumber);
|
|
|
|
|
|
|
|
/* Get partial count and loop partials */
|
|
|
|
Count = FullDescriptor->PartialResourceList.Count;
|
|
|
|
for (PartialDescriptor = FullDescriptor->PartialResourceList.PartialDescriptors;
|
|
|
|
Count;
|
2018-01-28 22:44:28 +00:00
|
|
|
PartialDescriptor = CmiGetNextPartialDescriptor(PartialDescriptor))
|
2010-09-12 06:03:12 +00:00
|
|
|
{
|
|
|
|
/* Print each partial */
|
|
|
|
PciDebugPrintPartialResource(PartialDescriptor);
|
|
|
|
Count--;
|
|
|
|
}
|
2018-01-28 22:44:28 +00:00
|
|
|
|
|
|
|
/* Go to the next full descriptor */
|
|
|
|
FullDescriptor = (PCM_FULL_RESOURCE_DESCRIPTOR)PartialDescriptor;
|
2010-09-12 06:03:12 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Done printing data */
|
|
|
|
DPRINT1("\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2010-04-01 19:07:40 +00:00
|
|
|
/* EOF */
|