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reactos/reactos/include/ndk/arm/mmtypes.h

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Add basic arm target support to the build system. Reactos-arm.rbuild uses the same settings as the x86 version, but defines _ARM_ and __arm__ instead. _M_ARM is already defined by the compiler. Add ARM system call stub support to ncitool. We are currently using a SWI 0x2E to achieve this. Add ARM support to winnt.h. Add a preliminary intrin_arm.h Add ketypes.h and mmtypes.h for ARM in the NDK. For now these are mostly stubs to allow compiling to work. Add ARM support to winddk.h. Fix some broken x86-only assumptions in the NDK. Add config-arm-template.rbuild. By defauilt we build for armv5te (armv4 and v5 are supported, not v6). Set ROS_ARCH=arm to switch to ARM. Set ROS_PREFIX to an appropriate MinGW-32 ARM PE crosscompiler. svn path=/trunk/; revision=32131
2008-02-05 02:58:28 +00:00
/*++ NDK Version: 0095
Copyright (c) Alex Ionescu. All rights reserved.
Header Name:
mmtypes.h (ARM)
Abstract:
ARM Type definitions for the Memory Manager
Author:
Alex Ionescu (alex.ionescu@reactos.com) 06-Oct-2004
--*/
#ifndef _ARM_MMTYPES_H
#define _ARM_MMTYPES_H
//
// Dependencies
//
//
// Page-related Macros
//
#define PAGE_SIZE 0x1000
#define PAGE_SHIFT 12L
#define MM_ALLOCATION_GRANULARITY 0x10000
#define MM_ALLOCATION_GRANULARITY_SHIFT 16L
//
// Sanity checks for Paging Macros
//
#ifdef C_ASSERT
C_ASSERT(PAGE_SIZE == (1 << PAGE_SHIFT));
C_ASSERT(MM_ALLOCATION_GRANULARITY == (1 << MM_ALLOCATION_GRANULARITY_SHIFT));
C_ASSERT(MM_ALLOCATION_GRANULARITY &&
!(MM_ALLOCATION_GRANULARITY & (MM_ALLOCATION_GRANULARITY - 1)));
C_ASSERT(MM_ALLOCATION_GRANULARITY >= PAGE_SIZE);
#endif
//
// Page Table Entry Definitions
//
typedef struct _HARDWARE_PTE_ARM
{
ARM Port Memory Management Checkpoint: - Implemented and defined the MMU-OS architecture for the ARM port. The details are too long for a commit message, but we have decided to replicate the x86 NT memory manager layout. We've defined a PTE_BASE at 0xC0000000 just like on x86, and we use a PDE_BASE at 0xC1000000. Unlike the x86, we can't use PDE-PTE self-mapping because ARM has different formats (and sizes!) for PDE vs PTEs! We emulate the behavior however (which adds a small performance hit) and the Mm porting is thus at least 10 times easier. - Moved serial port to 0xE0000000 for now. - We now parse the board memory map from u-boot. - Added memory allocation code to FreeLDR -- we now build a full ARC memory map for the kernel. - FreeLDR allocates page tables and sets up the initial support for our memory layout (see comments for some lengthier explenations) - Allocations made by FreeLDR for loading ReactOS are now made from a "shared heap" page that's also marked in the memory map. - Registry and NLS data are now being put into the loader block. - We now create a loader entry for the kernel (but not anything else -- we'll have to parse the list properly later). - Defined correct _HARDWARE_PTE_ARM and _MMPTE_HARDWARE for ARM. - ARM_COARSE_PAGE_TABLE is now 4KB instead of 1KB, going against the architecture! We do this for proper OS support of the PTE_BASE. - Fixed build due to KiSystemStartulReal change. - Fixed a bug on the x86 build when creating memory allocation descriptors. Memory corruption could occur in certain scenarios. - Implemented significant portions of the ARM memory manager code in the kernel: - MmGetPageDirectory. - MmDeletePageTable (for the kernel address space only). - MmIsPagePresent (for the kernel address space only). - MmCreateVirtualMappingForKernel. - MmCreateVirtualMapping (calls MmCreateVirtualMappingUnsafe). - MmCreateVirtualMappingUnsafe (for the kernel address space only). - MmSetPageProtect (unused on ARM). - MmCreateHyperspaceMapping. - MmDeleteHyperspaceMapping. - MmInitGlobalKernelPageDirectory. - MmInitPageDirectoryMap. - With the above, this means we now go well inside MmInit1: the PFN database is setup and works, memory areas are functional, and non-paged pool is fully working. - We currently hit a data abort during paged pool setup -- this is to be expected, since we don't have any exception handlers yet. These are coming up next -- we have to start handling crashes (and page faults). svn path=/trunk/; revision=32640
2008-03-10 17:27:14 +00:00
union
{
union
{
struct
{
ULONG Type:2;
ULONG Unused:30;
} Fault;
struct
{
ULONG Type:2;
ULONG Ignored:2;
ULONG Reserved:1;
ULONG Domain:4;
ULONG Ignored1:1;
ULONG BaseAddress:22;
} Coarse;
struct
{
ULONG Type:2;
ULONG Buffered:1;
ULONG Cached:1;
ULONG Reserved:1;
ULONG Domain:4;
ULONG Ignored:1;
ULONG Access:2;
ULONG Ignored1:8;
ULONG BaseAddress:12;
} Section;
struct
{
ULONG Type:2;
ULONG Reserved:3;
ULONG Domain:4;
ULONG Ignored:3;
ULONG BaseAddress:20;
} Fine;
} L1;
union
{
struct
{
ULONG Type:2;
ULONG Unused:30;
} Fault;
struct
{
ULONG Type:2;
ULONG Buffered:1;
ULONG Cached:1;
ULONG Access0:2;
ULONG Access1:2;
ULONG Access2:2;
ULONG Access3:2;
ULONG Ignored:4;
ULONG BaseAddress:16;
} Large;
struct
{
ULONG Type:2;
ULONG Buffered:1;
ULONG Cached:1;
ULONG Access0:2;
ULONG Access1:2;
ULONG Access2:2;
ULONG Access3:2;
ULONG BaseAddress:20;
} Small;
struct
{
ULONG Type:2;
ULONG Buffered:1;
ULONG Cached:1;
ULONG Access0:2;
ULONG Ignored:4;
ULONG BaseAddress:22;
} Tiny;
} L2;
ULONG AsUlong;
};
Add basic arm target support to the build system. Reactos-arm.rbuild uses the same settings as the x86 version, but defines _ARM_ and __arm__ instead. _M_ARM is already defined by the compiler. Add ARM system call stub support to ncitool. We are currently using a SWI 0x2E to achieve this. Add ARM support to winnt.h. Add a preliminary intrin_arm.h Add ketypes.h and mmtypes.h for ARM in the NDK. For now these are mostly stubs to allow compiling to work. Add ARM support to winddk.h. Fix some broken x86-only assumptions in the NDK. Add config-arm-template.rbuild. By defauilt we build for armv5te (armv4 and v5 are supported, not v6). Set ROS_ARCH=arm to switch to ARM. Set ROS_PREFIX to an appropriate MinGW-32 ARM PE crosscompiler. svn path=/trunk/; revision=32131
2008-02-05 02:58:28 +00:00
} HARDWARE_PTE_ARM, *PHARDWARE_PTE_ARM;
typedef struct _MMPTE_SOFTWARE
{
ULONG Valid:1;
ULONG PageFileLow:4;
ULONG Protection:5;
ULONG Prototype:1;
ULONG Transition:1;
ULONG PageFileHigh:20;
} MMPTE_SOFTWARE;
typedef struct _MMPTE_TRANSITION
{
ULONG Valid:1;
ULONG Write:1;
ULONG Owner:1;
ULONG WriteThrough:1;
ULONG CacheDisable:1;
ULONG Protection:5;
ULONG Prototype:1;
ULONG Transition:1;
ULONG PageFrameNumber:20;
} MMPTE_TRANSITION;
typedef struct _MMPTE_PROTOTYPE
{
ULONG Valid:1;
ULONG ProtoAddressLow:7;
ULONG ReadOnly:1;
ULONG WhichPool:1;
ULONG Prototype:1;
ULONG ProtoAddressHigh:21;
} MMPTE_PROTOTYPE;
typedef struct _MMPTE_SUBSECTION
{
ULONG Valid:1;
ULONG SubsectionAddressLow:4;
ULONG Protection:5;
ULONG Prototype:1;
ULONG SubsectionAddressHigh:20;
ULONG WhichPool:1;
} MMPTE_SUBSECTION;
typedef struct _MMPTE_LIST
{
ULONG Valid:1;
ULONG OneEntry:1;
ULONG filler0:8;
ULONG NextEntry:20;
ULONG Prototype:1;
ULONG filler1:1;
} MMPTE_LIST;
typedef struct _MMPTE_HARDWARE
{
ARM Port Memory Management Checkpoint: - Implemented and defined the MMU-OS architecture for the ARM port. The details are too long for a commit message, but we have decided to replicate the x86 NT memory manager layout. We've defined a PTE_BASE at 0xC0000000 just like on x86, and we use a PDE_BASE at 0xC1000000. Unlike the x86, we can't use PDE-PTE self-mapping because ARM has different formats (and sizes!) for PDE vs PTEs! We emulate the behavior however (which adds a small performance hit) and the Mm porting is thus at least 10 times easier. - Moved serial port to 0xE0000000 for now. - We now parse the board memory map from u-boot. - Added memory allocation code to FreeLDR -- we now build a full ARC memory map for the kernel. - FreeLDR allocates page tables and sets up the initial support for our memory layout (see comments for some lengthier explenations) - Allocations made by FreeLDR for loading ReactOS are now made from a "shared heap" page that's also marked in the memory map. - Registry and NLS data are now being put into the loader block. - We now create a loader entry for the kernel (but not anything else -- we'll have to parse the list properly later). - Defined correct _HARDWARE_PTE_ARM and _MMPTE_HARDWARE for ARM. - ARM_COARSE_PAGE_TABLE is now 4KB instead of 1KB, going against the architecture! We do this for proper OS support of the PTE_BASE. - Fixed build due to KiSystemStartulReal change. - Fixed a bug on the x86 build when creating memory allocation descriptors. Memory corruption could occur in certain scenarios. - Implemented significant portions of the ARM memory manager code in the kernel: - MmGetPageDirectory. - MmDeletePageTable (for the kernel address space only). - MmIsPagePresent (for the kernel address space only). - MmCreateVirtualMappingForKernel. - MmCreateVirtualMapping (calls MmCreateVirtualMappingUnsafe). - MmCreateVirtualMappingUnsafe (for the kernel address space only). - MmSetPageProtect (unused on ARM). - MmCreateHyperspaceMapping. - MmDeleteHyperspaceMapping. - MmInitGlobalKernelPageDirectory. - MmInitPageDirectoryMap. - With the above, this means we now go well inside MmInit1: the PFN database is setup and works, memory areas are functional, and non-paged pool is fully working. - We currently hit a data abort during paged pool setup -- this is to be expected, since we don't have any exception handlers yet. These are coming up next -- we have to start handling crashes (and page faults). svn path=/trunk/; revision=32640
2008-03-10 17:27:14 +00:00
union
{
union
{
struct
{
ULONG Type:2;
ULONG Unused:30;
} Fault;
struct
{
ULONG Type:2;
ULONG Ignored:2;
ULONG Reserved:1;
ULONG Domain:4;
ULONG Ignored1:1;
ULONG BaseAddress:22;
} Coarse;
struct
{
ULONG Type:2;
ULONG Buffered:1;
ULONG Cached:1;
ULONG Reserved:1;
ULONG Domain:4;
ULONG Ignored:1;
ULONG Access:2;
ULONG Ignored1:8;
ULONG BaseAddress:12;
} Section;
struct
{
ULONG Type:2;
ULONG Reserved:3;
ULONG Domain:4;
ULONG Ignored:3;
ULONG BaseAddress:20;
} Fine;
} L1;
union
{
struct
{
ULONG Type:2;
ULONG Unused:30;
} Fault;
struct
{
ULONG Type:2;
ULONG Buffered:1;
ULONG Cached:1;
ULONG Access0:2;
ULONG Access1:2;
ULONG Access2:2;
ULONG Access3:2;
ULONG Ignored:4;
ULONG BaseAddress:16;
} Large;
struct
{
ULONG Type:2;
ULONG Buffered:1;
ULONG Cached:1;
ULONG Access0:2;
ULONG Access1:2;
ULONG Access2:2;
ULONG Access3:2;
ULONG BaseAddress:20;
} Small;
struct
{
ULONG Type:2;
ULONG Buffered:1;
ULONG Cached:1;
ULONG Access0:2;
ULONG Ignored:4;
ULONG BaseAddress:22;
} Tiny;
} L2;
ULONG AsUlong;
};
Add basic arm target support to the build system. Reactos-arm.rbuild uses the same settings as the x86 version, but defines _ARM_ and __arm__ instead. _M_ARM is already defined by the compiler. Add ARM system call stub support to ncitool. We are currently using a SWI 0x2E to achieve this. Add ARM support to winnt.h. Add a preliminary intrin_arm.h Add ketypes.h and mmtypes.h for ARM in the NDK. For now these are mostly stubs to allow compiling to work. Add ARM support to winddk.h. Fix some broken x86-only assumptions in the NDK. Add config-arm-template.rbuild. By defauilt we build for armv5te (armv4 and v5 are supported, not v6). Set ROS_ARCH=arm to switch to ARM. Set ROS_PREFIX to an appropriate MinGW-32 ARM PE crosscompiler. svn path=/trunk/; revision=32131
2008-02-05 02:58:28 +00:00
} MMPTE_HARDWARE, *PMMPTE_HARDWARE;
//
// Use the right PTE structure
//
#define HARDWARE_PTE HARDWARE_PTE_ARM
#define PHARDWARE_PTE PHARDWARE_PTE_ARM
#endif
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