2004-12-16 17:34:54 +00:00
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/*
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* File cvconst.h - MS debug information
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*
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* Copyright (C) 2004, Eric Pouech
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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2007-12-19 21:11:06 +00:00
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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2004-12-16 17:34:54 +00:00
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*/
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2009-10-18 18:52:08 +00:00
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/* information in this file is highly derived from MSDN DIA information pages */
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2004-12-16 17:34:54 +00:00
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/* symbols & types enumeration */
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enum SymTagEnum
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{
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SymTagNull,
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SymTagExe,
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SymTagCompiland,
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SymTagCompilandDetails,
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SymTagCompilandEnv,
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SymTagFunction,
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SymTagBlock,
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SymTagData,
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SymTagAnnotation,
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SymTagLabel,
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SymTagPublicSymbol,
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SymTagUDT,
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SymTagEnum,
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SymTagFunctionType,
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SymTagPointerType,
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SymTagArrayType,
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SymTagBaseType,
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Finish the Wine sync. These components are not just rc file changes
atl, comctl32, comdlg32, dwmapi, fusion, gdiplus, jscript, mpr, mshtml, msi, msimtf, msxml3, ole32, oleaut32, riched20, shdocvw, shlwapi, urlmon, usp10, version and windowscodecs
Seems to build and boot. /me hides
svn path=/trunk/; revision=48273
2010-07-26 02:26:04 +00:00
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SymTagTypedef,
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2004-12-16 17:34:54 +00:00
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SymTagBaseClass,
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SymTagFriend,
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Finish the Wine sync. These components are not just rc file changes
atl, comctl32, comdlg32, dwmapi, fusion, gdiplus, jscript, mpr, mshtml, msi, msimtf, msxml3, ole32, oleaut32, riched20, shdocvw, shlwapi, urlmon, usp10, version and windowscodecs
Seems to build and boot. /me hides
svn path=/trunk/; revision=48273
2010-07-26 02:26:04 +00:00
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SymTagFunctionArgType,
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SymTagFuncDebugStart,
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2004-12-16 17:34:54 +00:00
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SymTagFuncDebugEnd,
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Finish the Wine sync. These components are not just rc file changes
atl, comctl32, comdlg32, dwmapi, fusion, gdiplus, jscript, mpr, mshtml, msi, msimtf, msxml3, ole32, oleaut32, riched20, shdocvw, shlwapi, urlmon, usp10, version and windowscodecs
Seems to build and boot. /me hides
svn path=/trunk/; revision=48273
2010-07-26 02:26:04 +00:00
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SymTagUsingNamespace,
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2004-12-16 17:34:54 +00:00
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SymTagVTableShape,
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SymTagVTable,
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SymTagCustom,
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SymTagThunk,
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SymTagCustomType,
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SymTagManagedType,
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SymTagDimension,
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SymTagMax
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};
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enum BasicType
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{
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btNoType = 0,
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btVoid = 1,
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btChar = 2,
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btWChar = 3,
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btInt = 6,
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btUInt = 7,
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btFloat = 8,
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btBCD = 9,
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btBool = 10,
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btLong = 13,
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btULong = 14,
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btCurrency = 25,
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btDate = 26,
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btVariant = 27,
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btComplex = 28,
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btBit = 29,
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btBSTR = 30,
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btHresult = 31,
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};
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/* kind of UDT */
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enum UdtKind
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{
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UdtStruct,
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UdtClass,
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UdtUnion
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};
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/* where a SymTagData is */
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enum LocationType
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{
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LocIsNull,
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LocIsStatic,
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LocIsTLS,
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LocIsRegRel,
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LocIsThisRel,
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LocIsEnregistered,
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LocIsBitField,
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LocIsSlot,
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LocIsIlRel,
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LocInMetaData,
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LocIsConstant
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};
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/* kind of SymTagData */
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enum DataKind
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{
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DataIsUnknown,
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DataIsLocal,
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DataIsStaticLocal,
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DataIsParam,
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DataIsObjectPtr,
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DataIsFileStatic,
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DataIsGlobal,
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DataIsMember,
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DataIsStaticMember,
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DataIsConstant
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};
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/* values for registers (on different CPUs) */
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enum CV_HREG_e
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{
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2007-12-19 21:11:06 +00:00
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/* those values are common to all supported CPUs (and CPU independent) */
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2004-12-16 17:34:54 +00:00
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CV_ALLREG_ERR = 30000,
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CV_ALLREG_TEB = 30001,
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CV_ALLREG_TIMER = 30002,
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CV_ALLREG_EFAD1 = 30003,
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CV_ALLREG_EFAD2 = 30004,
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CV_ALLREG_EFAD3 = 30005,
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CV_ALLREG_VFRAME = 30006,
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CV_ALLREG_HANDLE = 30007,
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CV_ALLREG_PARAMS = 30008,
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CV_ALLREG_LOCALS = 30009,
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/* Intel x86 CPU */
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CV_REG_NONE = 0,
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CV_REG_AL = 1,
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CV_REG_CL = 2,
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CV_REG_DL = 3,
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CV_REG_BL = 4,
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CV_REG_AH = 5,
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CV_REG_CH = 6,
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CV_REG_DH = 7,
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CV_REG_BH = 8,
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CV_REG_AX = 9,
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CV_REG_CX = 10,
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CV_REG_DX = 11,
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CV_REG_BX = 12,
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CV_REG_SP = 13,
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CV_REG_BP = 14,
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CV_REG_SI = 15,
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CV_REG_DI = 16,
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CV_REG_EAX = 17,
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CV_REG_ECX = 18,
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CV_REG_EDX = 19,
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CV_REG_EBX = 20,
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CV_REG_ESP = 21,
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CV_REG_EBP = 22,
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CV_REG_ESI = 23,
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CV_REG_EDI = 24,
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CV_REG_ES = 25,
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CV_REG_CS = 26,
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CV_REG_SS = 27,
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CV_REG_DS = 28,
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CV_REG_FS = 29,
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CV_REG_GS = 30,
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CV_REG_IP = 31,
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CV_REG_FLAGS = 32,
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CV_REG_EIP = 33,
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CV_REG_EFLAGS = 34,
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/* <pcode> */
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CV_REG_TEMP = 40,
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CV_REG_TEMPH = 41,
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CV_REG_QUOTE = 42,
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CV_REG_PCDR3 = 43, /* this includes PCDR4 to PCDR7 */
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CV_REG_CR0 = 80, /* this includes CR1 to CR4 */
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CV_REG_DR0 = 90, /* this includes DR1 to DR7 */
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/* </pcode> */
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CV_REG_GDTR = 110,
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CV_REG_GDTL = 111,
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CV_REG_IDTR = 112,
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CV_REG_IDTL = 113,
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CV_REG_LDTR = 114,
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CV_REG_TR = 115,
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2009-10-18 18:52:08 +00:00
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CV_REG_PSEUDO1 = 116, /* this includes Pseudo02 to Pseudo09 */
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2004-12-16 17:34:54 +00:00
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CV_REG_ST0 = 128, /* this includes ST1 to ST7 */
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CV_REG_CTRL = 136,
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CV_REG_STAT = 137,
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CV_REG_TAG = 138,
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CV_REG_FPIP = 139,
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CV_REG_FPCS = 140,
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CV_REG_FPDO = 141,
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CV_REG_FPDS = 142,
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CV_REG_ISEM = 143,
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CV_REG_FPEIP = 144,
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CV_REG_FPEDO = 145,
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CV_REG_MM0 = 146, /* this includes MM1 to MM7 */
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CV_REG_XMM0 = 154, /* this includes XMM1 to XMM7 */
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CV_REG_XMM00 = 162,
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CV_REG_XMM0L = 194, /* this includes XMM1L to XMM7L */
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CV_REG_XMM0H = 202, /* this includes XMM1H to XMM7H */
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CV_REG_MXCSR = 211,
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CV_REG_EDXEAX = 212,
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CV_REG_EMM0L = 220,
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CV_REG_EMM0H = 228,
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CV_REG_MM00 = 236,
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CV_REG_MM01 = 237,
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CV_REG_MM10 = 238,
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CV_REG_MM11 = 239,
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CV_REG_MM20 = 240,
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CV_REG_MM21 = 241,
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CV_REG_MM30 = 242,
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CV_REG_MM31 = 243,
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CV_REG_MM40 = 244,
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CV_REG_MM41 = 245,
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CV_REG_MM50 = 246,
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CV_REG_MM51 = 247,
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CV_REG_MM60 = 248,
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CV_REG_MM61 = 249,
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CV_REG_MM70 = 250,
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CV_REG_MM71 = 251,
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/* Motorola 68K CPU */
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CV_R68_D0 = 0, /* this includes D1 to D7 too */
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CV_R68_A0 = 8, /* this includes A1 to A7 too */
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CV_R68_CCR = 16,
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CV_R68_SR = 17,
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CV_R68_USP = 18,
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CV_R68_MSP = 19,
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CV_R68_SFC = 20,
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CV_R68_DFC = 21,
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CV_R68_CACR = 22,
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CV_R68_VBR = 23,
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CV_R68_CAAR = 24,
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CV_R68_ISP = 25,
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CV_R68_PC = 26,
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CV_R68_FPCR = 28,
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CV_R68_FPSR = 29,
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CV_R68_FPIAR = 30,
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CV_R68_FP0 = 32, /* this includes FP1 to FP7 */
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CV_R68_MMUSR030 = 41,
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CV_R68_MMUSR = 42,
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CV_R68_URP = 43,
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CV_R68_DTT0 = 44,
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CV_R68_DTT1 = 45,
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CV_R68_ITT0 = 46,
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CV_R68_ITT1 = 47,
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CV_R68_PSR = 51,
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CV_R68_PCSR = 52,
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CV_R68_VAL = 53,
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CV_R68_CRP = 54,
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CV_R68_SRP = 55,
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CV_R68_DRP = 56,
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CV_R68_TC = 57,
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CV_R68_AC = 58,
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CV_R68_SCC = 59,
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CV_R68_CAL = 60,
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CV_R68_TT0 = 61,
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CV_R68_TT1 = 62,
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CV_R68_BAD0 = 64, /* this includes BAD1 to BAD7 */
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CV_R68_BAC0 = 72, /* this includes BAC1 to BAC7 */
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/* MIPS 4000 CPU */
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CV_M4_NOREG = CV_REG_NONE,
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CV_M4_IntZERO = 10,
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CV_M4_IntAT = 11,
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CV_M4_IntV0 = 12,
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CV_M4_IntV1 = 13,
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CV_M4_IntA0 = 14, /* this includes IntA1 to IntA3 */
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CV_M4_IntT0 = 18, /* this includes IntT1 to IntT7 */
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CV_M4_IntS0 = 26, /* this includes IntS1 to IntS7 */
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CV_M4_IntT8 = 34,
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CV_M4_IntT9 = 35,
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CV_M4_IntKT0 = 36,
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CV_M4_IntKT1 = 37,
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CV_M4_IntGP = 38,
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CV_M4_IntSP = 39,
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CV_M4_IntS8 = 40,
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CV_M4_IntRA = 41,
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CV_M4_IntLO = 42,
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CV_M4_IntHI = 43,
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CV_M4_Fir = 50,
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CV_M4_Psr = 51,
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CV_M4_FltF0 = 60, /* this includes FltF1 to Flt31 */
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CV_M4_FltFsr = 92,
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Finish the Wine sync. These components are not just rc file changes
atl, comctl32, comdlg32, dwmapi, fusion, gdiplus, jscript, mpr, mshtml, msi, msimtf, msxml3, ole32, oleaut32, riched20, shdocvw, shlwapi, urlmon, usp10, version and windowscodecs
Seems to build and boot. /me hides
svn path=/trunk/; revision=48273
2010-07-26 02:26:04 +00:00
|
|
|
|
2004-12-16 17:34:54 +00:00
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/* Alpha AXP CPU */
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CV_ALPHA_NOREG = CV_REG_NONE,
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CV_ALPHA_FltF0 = 10, /* this includes FltF1 to FltF31 */
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CV_ALPHA_IntV0 = 42,
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CV_ALPHA_IntT0 = 43, /* this includes T1 to T7 */
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CV_ALPHA_IntS0 = 51, /* this includes S1 to S5 */
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CV_ALPHA_IntFP = 57,
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CV_ALPHA_IntA0 = 58, /* this includes A1 to A5 */
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CV_ALPHA_IntT8 = 64,
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CV_ALPHA_IntT9 = 65,
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CV_ALPHA_IntT10 = 66,
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CV_ALPHA_IntT11 = 67,
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CV_ALPHA_IntRA = 68,
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CV_ALPHA_IntT12 = 69,
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CV_ALPHA_IntAT = 70,
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CV_ALPHA_IntGP = 71,
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CV_ALPHA_IntSP = 72,
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CV_ALPHA_IntZERO = 73,
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CV_ALPHA_Fpcr = 74,
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CV_ALPHA_Fir = 75,
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CV_ALPHA_Psr = 76,
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CV_ALPHA_FltFsr = 77,
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CV_ALPHA_SoftFpcr = 78,
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Finish the Wine sync. These components are not just rc file changes
atl, comctl32, comdlg32, dwmapi, fusion, gdiplus, jscript, mpr, mshtml, msi, msimtf, msxml3, ole32, oleaut32, riched20, shdocvw, shlwapi, urlmon, usp10, version and windowscodecs
Seems to build and boot. /me hides
svn path=/trunk/; revision=48273
2010-07-26 02:26:04 +00:00
|
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|
|
2004-12-16 17:34:54 +00:00
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/* Motorola & IBM PowerPC CPU */
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CV_PPC_GPR0 = 1, /* this includes GPR1 to GPR31 */
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CV_PPC_CR = 33,
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CV_PPC_CR0 = 34, /* this includes CR1 to CR7 */
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CV_PPC_FPR0 = 42, /* this includes FPR1 to FPR31 */
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CV_PPC_FPSCR = 74,
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CV_PPC_MSR = 75,
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CV_PPC_SR0 = 76, /* this includes SR1 to SR15 */
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/* some PPC registers missing */
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|
/* Hitachi SH3 CPU */
|
|
|
|
CV_SH3_NOREG = CV_REG_NONE,
|
|
|
|
CV_SH3_IntR0 = 10, /* this include R1 to R13 */
|
|
|
|
CV_SH3_IntFp = 24,
|
|
|
|
CV_SH3_IntSp = 25,
|
|
|
|
CV_SH3_Gbr = 38,
|
|
|
|
CV_SH3_Pr = 39,
|
|
|
|
CV_SH3_Mach = 40,
|
|
|
|
CV_SH3_Macl = 41,
|
|
|
|
CV_SH3_Pc = 50,
|
|
|
|
CV_SH3_Sr = 51,
|
|
|
|
CV_SH3_BarA = 60,
|
|
|
|
CV_SH3_BasrA = 61,
|
|
|
|
CV_SH3_BamrA = 62,
|
|
|
|
CV_SH3_BbrA = 63,
|
|
|
|
CV_SH3_BarB = 64,
|
|
|
|
CV_SH3_BasrB = 65,
|
|
|
|
CV_SH3_BamrB = 66,
|
|
|
|
CV_SH3_BbrB = 67,
|
|
|
|
CV_SH3_BdrB = 68,
|
|
|
|
CV_SH3_BdmrB = 69,
|
|
|
|
CV_SH3_Brcr = 70,
|
|
|
|
CV_SH_Fpscr = 75,
|
|
|
|
CV_SH_Fpul = 76,
|
|
|
|
CV_SH_FpR0 = 80, /* this includes FpR1 to FpR15 */
|
|
|
|
CV_SH_XFpR0 = 96, /* this includes XFpR1 to XXFpR15 */
|
|
|
|
|
|
|
|
/* ARM CPU */
|
|
|
|
CV_ARM_NOREG = CV_REG_NONE,
|
|
|
|
CV_ARM_R0 = 10, /* this includes R1 to R12 */
|
|
|
|
CV_ARM_SP = 23,
|
|
|
|
CV_ARM_LR = 24,
|
|
|
|
CV_ARM_PC = 25,
|
|
|
|
CV_ARM_CPSR = 26,
|
Finish the Wine sync. These components are not just rc file changes
atl, comctl32, comdlg32, dwmapi, fusion, gdiplus, jscript, mpr, mshtml, msi, msimtf, msxml3, ole32, oleaut32, riched20, shdocvw, shlwapi, urlmon, usp10, version and windowscodecs
Seems to build and boot. /me hides
svn path=/trunk/; revision=48273
2010-07-26 02:26:04 +00:00
|
|
|
|
2004-12-16 17:34:54 +00:00
|
|
|
/* Intel IA64 CPU */
|
|
|
|
CV_IA64_NOREG = CV_REG_NONE,
|
|
|
|
CV_IA64_Br0 = 512, /* this includes Br1 to Br7 */
|
|
|
|
CV_IA64_P0 = 704, /* this includes P1 to P63 */
|
|
|
|
CV_IA64_Preds = 768,
|
|
|
|
CV_IA64_IntH0 = 832, /* this includes H1 to H15 */
|
|
|
|
CV_IA64_Ip = 1016,
|
|
|
|
CV_IA64_Umask = 1017,
|
|
|
|
CV_IA64_Cfm = 1018,
|
|
|
|
CV_IA64_Psr = 1019,
|
|
|
|
CV_IA64_Nats = 1020,
|
|
|
|
CV_IA64_Nats2 = 1021,
|
|
|
|
CV_IA64_Nats3 = 1022,
|
|
|
|
CV_IA64_IntR0 = 1024, /* this includes R1 to R127 */
|
|
|
|
CV_IA64_FltF0 = 2048, /* this includes FltF1 to FltF127 */
|
|
|
|
/* some IA64 registers missing */
|
|
|
|
|
|
|
|
/* TriCore CPU */
|
|
|
|
CV_TRI_NOREG = CV_REG_NONE,
|
|
|
|
CV_TRI_D0 = 10, /* includes D1 to D15 */
|
|
|
|
CV_TRI_A0 = 26, /* includes A1 to A15 */
|
|
|
|
CV_TRI_E0 = 42,
|
|
|
|
CV_TRI_E2 = 43,
|
|
|
|
CV_TRI_E4 = 44,
|
|
|
|
CV_TRI_E6 = 45,
|
|
|
|
CV_TRI_E8 = 46,
|
|
|
|
CV_TRI_E10 = 47,
|
|
|
|
CV_TRI_E12 = 48,
|
|
|
|
CV_TRI_E14 = 49,
|
|
|
|
CV_TRI_EA0 = 50,
|
|
|
|
CV_TRI_EA2 = 51,
|
|
|
|
CV_TRI_EA4 = 52,
|
|
|
|
CV_TRI_EA6 = 53,
|
|
|
|
CV_TRI_EA8 = 54,
|
|
|
|
CV_TRI_EA10 = 55,
|
|
|
|
CV_TRI_EA12 = 56,
|
|
|
|
CV_TRI_EA14 = 57,
|
|
|
|
/* some TriCode registers missing */
|
|
|
|
|
|
|
|
/* AM33 (and the likes) CPU */
|
|
|
|
CV_AM33_NOREG = CV_REG_NONE,
|
|
|
|
CV_AM33_E0 = 10, /* this includes E1 to E7 */
|
|
|
|
CV_AM33_A0 = 20, /* this includes A1 to A3 */
|
|
|
|
CV_AM33_D0 = 30, /* this includes D1 to D3 */
|
|
|
|
CV_AM33_FS0 = 40, /* this includes FS1 to FS31 */
|
|
|
|
|
|
|
|
/* Mitsubishi M32R CPU */
|
|
|
|
CV_M32R_NOREG = CV_REG_NONE,
|
|
|
|
CV_M32R_R0 = 10, /* this includes R1 to R11 */
|
|
|
|
CV_M32R_R12 = 22,
|
|
|
|
CV_M32R_R13 = 23,
|
|
|
|
CV_M32R_R14 = 24,
|
|
|
|
CV_M32R_R15 = 25,
|
|
|
|
CV_M32R_PSW = 26,
|
|
|
|
CV_M32R_CBR = 27,
|
|
|
|
CV_M32R_SPI = 28,
|
|
|
|
CV_M32R_SPU = 29,
|
|
|
|
CV_M32R_SPO = 30,
|
|
|
|
CV_M32R_BPC = 31,
|
|
|
|
CV_M32R_ACHI = 32,
|
|
|
|
CV_M32R_ACLO = 33,
|
|
|
|
CV_M32R_PC = 34,
|
2007-12-19 21:11:06 +00:00
|
|
|
|
|
|
|
/* AMD/Intel x86_64 CPU */
|
|
|
|
CV_AMD64_NONE = CV_REG_NONE,
|
|
|
|
CV_AMD64_AL = CV_REG_AL,
|
|
|
|
CV_AMD64_CL = CV_REG_CL,
|
|
|
|
CV_AMD64_DL = CV_REG_DL,
|
|
|
|
CV_AMD64_BL = CV_REG_BL,
|
|
|
|
CV_AMD64_AH = CV_REG_AH,
|
|
|
|
CV_AMD64_CH = CV_REG_CH,
|
|
|
|
CV_AMD64_DH = CV_REG_DH,
|
|
|
|
CV_AMD64_BH = CV_REG_BH,
|
|
|
|
CV_AMD64_AX = CV_REG_AX,
|
|
|
|
CV_AMD64_CX = CV_REG_CX,
|
|
|
|
CV_AMD64_DX = CV_REG_DX,
|
|
|
|
CV_AMD64_BX = CV_REG_BX,
|
|
|
|
CV_AMD64_SP = CV_REG_SP,
|
|
|
|
CV_AMD64_BP = CV_REG_BP,
|
|
|
|
CV_AMD64_SI = CV_REG_SI,
|
|
|
|
CV_AMD64_DI = CV_REG_DI,
|
|
|
|
CV_AMD64_EAX = CV_REG_EAX,
|
|
|
|
CV_AMD64_ECX = CV_REG_ECX,
|
|
|
|
CV_AMD64_EDX = CV_REG_EDX,
|
|
|
|
CV_AMD64_EBX = CV_REG_EBX,
|
|
|
|
CV_AMD64_ESP = CV_REG_ESP,
|
|
|
|
CV_AMD64_EBP = CV_REG_EBP,
|
|
|
|
CV_AMD64_ESI = CV_REG_ESI,
|
|
|
|
CV_AMD64_EDI = CV_REG_EDI,
|
|
|
|
CV_AMD64_ES = CV_REG_ES,
|
|
|
|
CV_AMD64_CS = CV_REG_CS,
|
|
|
|
CV_AMD64_SS = CV_REG_SS,
|
|
|
|
CV_AMD64_DS = CV_REG_DS,
|
|
|
|
CV_AMD64_FS = CV_REG_FS,
|
|
|
|
CV_AMD64_GS = CV_REG_GS,
|
|
|
|
CV_AMD64_FLAGS = CV_REG_FLAGS,
|
|
|
|
CV_AMD64_RIP = CV_REG_EIP,
|
|
|
|
CV_AMD64_EFLAGS = CV_REG_EFLAGS,
|
|
|
|
|
|
|
|
/* <pcode> */
|
|
|
|
CV_AMD64_TEMP = CV_REG_TEMP,
|
|
|
|
CV_AMD64_TEMPH = CV_REG_TEMPH,
|
|
|
|
CV_AMD64_QUOTE = CV_REG_QUOTE,
|
|
|
|
CV_AMD64_PCDR3 = CV_REG_PCDR3, /* this includes PCDR4 to PCDR7 */
|
|
|
|
CV_AMD64_CR0 = CV_REG_CR0, /* this includes CR1 to CR4 */
|
|
|
|
CV_AMD64_DR0 = CV_REG_DR0, /* this includes DR1 to DR7 */
|
|
|
|
/* </pcode> */
|
|
|
|
|
|
|
|
CV_AMD64_GDTR = CV_REG_GDTR,
|
|
|
|
CV_AMD64_GDTL = CV_REG_GDTL,
|
|
|
|
CV_AMD64_IDTR = CV_REG_IDTR,
|
|
|
|
CV_AMD64_IDTL = CV_REG_IDTL,
|
|
|
|
CV_AMD64_LDTR = CV_REG_LDTR,
|
|
|
|
CV_AMD64_TR = CV_REG_TR,
|
|
|
|
|
2009-10-18 18:52:08 +00:00
|
|
|
CV_AMD64_PSEUDO1 = CV_REG_PSEUDO1, /* this includes Pseudo02 to Pseudo09 */
|
2007-12-19 21:11:06 +00:00
|
|
|
CV_AMD64_ST0 = CV_REG_ST0, /* this includes ST1 to ST7 */
|
|
|
|
CV_AMD64_CTRL = CV_REG_CTRL,
|
|
|
|
CV_AMD64_STAT = CV_REG_STAT,
|
|
|
|
CV_AMD64_TAG = CV_REG_TAG,
|
|
|
|
CV_AMD64_FPIP = CV_REG_FPIP,
|
|
|
|
CV_AMD64_FPCS = CV_REG_FPCS,
|
|
|
|
CV_AMD64_FPDO = CV_REG_FPDO,
|
|
|
|
CV_AMD64_FPDS = CV_REG_FPDS,
|
|
|
|
CV_AMD64_ISEM = CV_REG_ISEM,
|
|
|
|
CV_AMD64_FPEIP = CV_REG_FPEIP,
|
|
|
|
CV_AMD64_FPEDO = CV_REG_FPEDO,
|
|
|
|
CV_AMD64_MM0 = CV_REG_MM0, /* this includes MM1 to MM7 */
|
|
|
|
CV_AMD64_XMM0 = CV_REG_XMM0, /* this includes XMM1 to XMM7 */
|
|
|
|
CV_AMD64_XMM00 = CV_REG_XMM00,
|
|
|
|
CV_AMD64_XMM0L = CV_REG_XMM0L, /* this includes XMM1L to XMM7L */
|
|
|
|
CV_AMD64_XMM0H = CV_REG_XMM0H, /* this includes XMM1H to XMM7H */
|
|
|
|
CV_AMD64_MXCSR = CV_REG_MXCSR,
|
|
|
|
CV_AMD64_EDXEAX = CV_REG_EDXEAX,
|
|
|
|
CV_AMD64_EMM0L = CV_REG_EMM0L,
|
|
|
|
CV_AMD64_EMM0H = CV_REG_EMM0H,
|
|
|
|
CV_AMD64_MM00 = CV_REG_MM00,
|
|
|
|
CV_AMD64_MM01 = CV_REG_MM01,
|
|
|
|
CV_AMD64_MM10 = CV_REG_MM10,
|
|
|
|
CV_AMD64_MM11 = CV_REG_MM11,
|
|
|
|
CV_AMD64_MM20 = CV_REG_MM20,
|
|
|
|
CV_AMD64_MM21 = CV_REG_MM21,
|
|
|
|
CV_AMD64_MM30 = CV_REG_MM30,
|
|
|
|
CV_AMD64_MM31 = CV_REG_MM31,
|
|
|
|
CV_AMD64_MM40 = CV_REG_MM40,
|
|
|
|
CV_AMD64_MM41 = CV_REG_MM41,
|
|
|
|
CV_AMD64_MM50 = CV_REG_MM50,
|
|
|
|
CV_AMD64_MM51 = CV_REG_MM51,
|
|
|
|
CV_AMD64_MM60 = CV_REG_MM60,
|
|
|
|
CV_AMD64_MM61 = CV_REG_MM61,
|
|
|
|
CV_AMD64_MM70 = CV_REG_MM70,
|
|
|
|
CV_AMD64_MM71 = CV_REG_MM71,
|
|
|
|
|
Finish the Wine sync. These components are not just rc file changes
atl, comctl32, comdlg32, dwmapi, fusion, gdiplus, jscript, mpr, mshtml, msi, msimtf, msxml3, ole32, oleaut32, riched20, shdocvw, shlwapi, urlmon, usp10, version and windowscodecs
Seems to build and boot. /me hides
svn path=/trunk/; revision=48273
2010-07-26 02:26:04 +00:00
|
|
|
CV_AMD64_XMM8 = 252, /* this includes XMM9 to XMM15 */
|
|
|
|
|
2007-12-19 21:11:06 +00:00
|
|
|
CV_AMD64_RAX = 328,
|
|
|
|
CV_AMD64_RBX = 329,
|
|
|
|
CV_AMD64_RCX = 330,
|
|
|
|
CV_AMD64_RDX = 331,
|
|
|
|
CV_AMD64_RSI = 332,
|
|
|
|
CV_AMD64_RDI = 333,
|
|
|
|
CV_AMD64_RBP = 334,
|
|
|
|
CV_AMD64_RSP = 335,
|
|
|
|
|
|
|
|
CV_AMD64_R8 = 336,
|
|
|
|
CV_AMD64_R9 = 337,
|
|
|
|
CV_AMD64_R10 = 338,
|
|
|
|
CV_AMD64_R11 = 339,
|
|
|
|
CV_AMD64_R12 = 340,
|
|
|
|
CV_AMD64_R13 = 341,
|
|
|
|
CV_AMD64_R14 = 342,
|
|
|
|
CV_AMD64_R15 = 343,
|
2012-03-16 15:04:59 +00:00
|
|
|
|
|
|
|
/* Wine extension */
|
|
|
|
CV_SPARC_NOREG = CV_REG_NONE,
|
|
|
|
CV_SPARC_G0 = 10, /* includes g0 to g7 */
|
|
|
|
CV_SPARC_O0 = 18, /* includes o0 to o7 */
|
|
|
|
CV_SPARC_L0 = 26, /* includes l0 to l7 */
|
|
|
|
CV_SPARC_I0 = 34, /* includes i0 to i7 */
|
|
|
|
CV_SPARC_PSR = 42,
|
|
|
|
CV_SPARC_PC = 43,
|
|
|
|
CV_SPARC_NPC = 44,
|
|
|
|
CV_SPARC_Y = 45,
|
|
|
|
CV_SPARC_WIM = 46,
|
|
|
|
CV_SPARC_TBR = 47,
|
2009-10-18 18:52:08 +00:00
|
|
|
};
|
2004-12-16 17:34:54 +00:00
|
|
|
|
|
|
|
typedef enum
|
|
|
|
{
|
|
|
|
THUNK_ORDINAL_NOTYPE,
|
|
|
|
THUNK_ORDINAL_ADJUSTOR,
|
|
|
|
THUNK_ORDINAL_VCALL,
|
|
|
|
THUNK_ORDINAL_PCODE,
|
Finish the Wine sync. These components are not just rc file changes
atl, comctl32, comdlg32, dwmapi, fusion, gdiplus, jscript, mpr, mshtml, msi, msimtf, msxml3, ole32, oleaut32, riched20, shdocvw, shlwapi, urlmon, usp10, version and windowscodecs
Seems to build and boot. /me hides
svn path=/trunk/; revision=48273
2010-07-26 02:26:04 +00:00
|
|
|
THUNK_ORDINAL_LOAD
|
2004-12-16 17:34:54 +00:00
|
|
|
} THUNK_ORDINAL;
|
2007-12-19 21:11:06 +00:00
|
|
|
|
|
|
|
typedef enum CV_call_e
|
|
|
|
{
|
|
|
|
CV_CALL_NEAR_C,
|
|
|
|
CV_CALL_FAR_C,
|
|
|
|
CV_CALL_NEAR_PASCAL,
|
|
|
|
CV_CALL_FAR_PASCAL,
|
|
|
|
CV_CALL_NEAR_FAST,
|
|
|
|
CV_CALL_FAR_FAST,
|
|
|
|
CV_CALL_SKIPPED,
|
|
|
|
CV_CALL_NEAR_STD,
|
|
|
|
CV_CALL_FAR_STD,
|
|
|
|
CV_CALL_NEAR_SYS,
|
|
|
|
CV_CALL_FAR_SYS,
|
|
|
|
CV_CALL_THISCALL,
|
|
|
|
CV_CALL_MIPSCALL,
|
|
|
|
CV_CALL_GENERIC,
|
|
|
|
CV_CALL_ALPHACALL,
|
|
|
|
CV_CALL_PPCCALL,
|
2012-03-16 15:04:59 +00:00
|
|
|
CV_CALL_SHCALL,
|
|
|
|
CV_CALL_ARMCALL,
|
|
|
|
CV_CALL_AM33CALL,
|
|
|
|
CV_CALL_TRICALL,
|
|
|
|
CV_CALL_SH5CALL,
|
|
|
|
CV_CALL_M32RCALL,
|
2007-12-19 21:11:06 +00:00
|
|
|
CV_CALL_RESERVED,
|
|
|
|
} CV_call_e;
|