2007-11-04 12:09:37 +00:00
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/*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* FILE: ntoskrnl/ke/i386/ctxswitch.S
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* PURPOSE: Thread Context Switching
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*
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* PROGRAMMERS: arty
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(i386 implementation by Alex Ionescu)
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*/
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/* INCLUDES ******************************************************************/
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2008-01-23 00:43:39 +00:00
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.text
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.globl syscall_start
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.globl syscall_end
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.globl KiSystemService
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syscall_start:
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mtsprg0 0
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mtsprg1 1
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/* Save and modify srr0 */
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/* Make a place to store the old srr0 and srr1 ... we may fault
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* getting KiSystemService1 which will clobber them. */
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lis 1,1
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mfsrr0 0
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stw 0,-16(1)
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mfsrr1 0
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stw 0,-12(1)
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/* Load the target address */
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lis 1,KiSystemService1@ha
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addi 1,1,KiSystemService1@l
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mtsrr0 1
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mfsprg0 0
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mfsprg1 1
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rfi
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syscall_end:
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.space 4
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2007-11-04 12:09:37 +00:00
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.globl KiSystemService
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.globl KiSystemService1
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.globl kiss_proceed
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.globl kiss_end
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2008-01-23 00:43:39 +00:00
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.align 8
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2007-11-04 12:09:37 +00:00
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KiSystemService1:
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2008-01-23 00:43:39 +00:00
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stwu 1,-256(1)
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stw 0,16(1)
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mflr 0
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stw 0,264(1)
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addi 1,1,16
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stw 2,8(1)
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2007-11-04 12:09:37 +00:00
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stw 3,12(1)
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stw 4,16(1)
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stw 5,20(1)
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stw 6,24(1)
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stw 7,28(1)
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stw 8,32(1)
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stw 9,36(1)
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stw 10,40(1)
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stw 11,44(1)
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stw 12,48(1)
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stw 13,52(1)
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stw 14,56(1)
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stw 15,60(1)
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stw 16,64(1)
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stw 17,68(1)
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stw 18,72(1)
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stw 19,76(1)
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stw 20,80(1)
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stw 21,84(1)
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stw 22,88(1)
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stw 23,92(1)
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stw 24,96(1)
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stw 25,100(1)
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stw 26,104(1)
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stw 27,108(1)
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stw 28,112(1)
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stw 29,116(1)
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stw 30,120(1)
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stw 31,124(1)
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mflr 0
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stw 0,128(1)
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mfctr 0
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stw 0,136(1)
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2008-01-23 00:43:39 +00:00
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mfmsr 0
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andi. 0,0,0xffef
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mtmsr 0
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lis 2,1
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lwz 30,-12(2)
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lwz 31,-16(2)
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mfmsr 0
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ori 0,0,0x10
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mtmsr 0
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stw 31,140(1)
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stw 30,144(1)
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2007-11-04 12:09:37 +00:00
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mfdsisr 0
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stw 0,148(1)
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mfdar 0
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stw 0,152(1)
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lis 3,KiSystemService@ha
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addi 3,3,KiSystemService@l
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mtctr 3
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mr 3,1
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2008-01-23 00:43:39 +00:00
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subi 1,1,16
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2007-11-04 12:09:37 +00:00
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bctrl
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2008-01-23 00:43:39 +00:00
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addi 1,1,16
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2007-11-04 12:09:37 +00:00
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/* Return from kernel */
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2008-01-23 00:43:39 +00:00
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lwz 3,32(1) /* Result */
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2007-11-04 12:09:37 +00:00
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lwz 0,128(1)
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mtlr 0
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lwz 0,140(1)
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mtsrr0 0
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lwz 0,144(1)
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mtsrr1 0
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2008-01-23 00:43:39 +00:00
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addi 1,1,0x100 - 16
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2007-11-04 12:09:37 +00:00
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rfi
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.globl KiDecrementerTrapHandler
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.globl KiDecrementerTrapHandlerEnd
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.globl KiDecrementerTrap
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KiDecrementerTrapHandler:
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2008-01-23 00:43:39 +00:00
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mtsprg0 0
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mtsprg1 1
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/* Save and modify srr0 */
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/* Make a place to store the old srr0 and srr1 ... we may fault
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* getting KiSystemService1 which will clobber them. */
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lis 1,1
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mfsprg1 0
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stw 0,-24(1)
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2007-11-04 12:09:37 +00:00
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mfsrr1 0
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2008-01-23 00:43:39 +00:00
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stw 0,-28(1)
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mfsrr0 0
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stw 0,-32(1)
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/* Load the target address */
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lis 1,KiDecrementerTrapUpper@ha
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addi 1,1,KiDecrementerTrapUpper@l
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mtsrr0 1
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mfsprg0 0
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mfsprg1 1
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rfi
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2007-11-04 12:09:37 +00:00
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KiDecrementerTrapHandlerEnd:
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.long 0
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/* Decrementer needs to restore the full CPU state */
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2008-01-23 00:43:39 +00:00
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.globl KiDecrementerTrapUpper
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.align 8
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KiDecrementerTrapUpper:
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lis 1,_kernel_trap_stack@ha
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addi 1,1,_kernel_trap_stack@l
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subi 1,1,0x200
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stw 0,0x5c(1)
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/* Stack handled a bit later */
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stw 2,0x64(1)
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stw 3,0x68(1)
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stw 4,0x6c(1)
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stw 5,0x70(1)
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stw 6,0x74(1)
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stw 7,0x78(1)
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stw 8,0x7c(1)
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stw 9,0x80(1)
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stw 10,0x84(1)
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stw 11,0x88(1)
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stw 12,0x8c(1)
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stw 13,0x90(1)
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stw 14,0x94(1)
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stw 15,0x98(1)
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stw 16,0x9c(1)
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stw 17,0xa0(1)
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stw 18,0xa4(1)
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stw 19,0xa8(1)
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stw 20,0xac(1)
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stw 21,0xb0(1)
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stw 22,0xb4(1)
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stw 23,0xb8(1)
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stw 24,0xbc(1)
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stw 25,0xc0(1)
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stw 26,0xc4(1)
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stw 27,0xc8(1)
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stw 28,0xcc(1)
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stw 29,0xd0(1)
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stw 30,0xd4(1)
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stw 31,0xd8(1)
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mfcr 0
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stw 0,0x108(1)
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mfxer 0
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stw 0,0x10c(1)
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mflr 0
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stw 0,0x118(1)
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mfctr 0
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stw 0,0x11c(1)
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mfmsr 0
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andi. 0,0,0x7fef
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mtmsr 0
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lis 2,1
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lwz 29,-24(2) // Stack
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lwz 30,-28(2) // srr1
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lwz 31,-32(2) // srr0
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mfmsr 0
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ori 0,0,0x30
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mtmsr 0
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stw 29,0x60(1) // Stack
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stw 30,0x110(1) // srr1
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stw 31,0x114(1) // srr0
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mr 3,1
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subi 1,1,16
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bl KiDecrementerTrap
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addi 1,1,16
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lwz 2,0x64(1)
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lwz 3,0x68(1)
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lwz 4,0x6c(1)
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lwz 5,0x70(1)
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lwz 6,0x74(1)
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lwz 7,0x78(1)
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lwz 8,0x7c(1)
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lwz 9,0x80(1)
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lwz 10,0x84(1)
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lwz 11,0x88(1)
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lwz 12,0x8c(1)
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lwz 13,0x90(1)
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lwz 14,0x94(1)
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lwz 15,0x98(1)
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lwz 16,0x9c(1)
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lwz 17,0xa0(1)
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lwz 18,0xa4(1)
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lwz 19,0xa8(1)
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lwz 20,0xac(1)
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lwz 21,0xb0(1)
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lwz 22,0xb4(1)
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lwz 23,0xb8(1)
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lwz 24,0xbc(1)
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lwz 25,0xc0(1)
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lwz 26,0xc4(1)
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lwz 27,0xc8(1)
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lwz 28,0xcc(1)
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lwz 29,0xd0(1)
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lwz 30,0xd4(1)
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lwz 31,0xd8(1)
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lwz 0,0x108(1)
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mtcr 0
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lwz 0,0x10c(1)
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mtxer 0
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lwz 0,0x110(1)
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mtsrr1 0
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lwz 0,0x114(1)
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2007-11-04 12:09:37 +00:00
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mtsrr0 0
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2008-01-23 00:43:39 +00:00
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lwz 0,0x118(1)
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2007-11-04 12:09:37 +00:00
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mtlr 0
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2008-01-23 00:43:39 +00:00
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lwz 0,0x11c(1)
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2007-11-04 12:09:37 +00:00
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mtctr 0
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// back out r0 and r1
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2008-01-23 00:43:39 +00:00
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lwz 0,0x5c(1)
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lwz 1,0x60(1)
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2007-11-04 12:09:37 +00:00
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// Bye!!1
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rfi
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