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reactos/ntoskrnl/include/internal/arm/ksarm.h

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- We now define a much simpler system call interface -- instead of using interrupt 2E with the system call ID in the ip register, we use the system call ID as the interrupt number! On ARM, all software interrupts have a generic handler, so ANY software interrupt will be a system call, and the interrupt number is the system call ID! - Removed a bunch more i386-only exports from the ARM kernel. - Implemented all the READ/WRITE_REGISTER* routines for ARM/PPC. - Implement half of KiSoftwareInterruptException, which calls KiSoftwareInterruptHandler, which calls KiSystemService. We now reach the first kernel-mode system call! (ZwClose from PspInitPhase0). - Reformat fastinterlck.c and change the way it's included per-architecture. svn path=/trunk/; revision=32666
2008-03-12 18:17:55 +00:00
/*
* PROJECT: ReactOS Kernel
- Implement beginnings of Ramdisk Port Driver. Planning compatibility with ISO, SDI and WIM files and full Windows support. - New license for our code. svn path=/trunk/; revision=34170
2008-06-29 02:58:05 +00:00
* LICENSE: BSD - See COPYING.ARM in the top level directory
- We now define a much simpler system call interface -- instead of using interrupt 2E with the system call ID in the ip register, we use the system call ID as the interrupt number! On ARM, all software interrupts have a generic handler, so ANY software interrupt will be a system call, and the interrupt number is the system call ID! - Removed a bunch more i386-only exports from the ARM kernel. - Implemented all the READ/WRITE_REGISTER* routines for ARM/PPC. - Implement half of KiSoftwareInterruptException, which calls KiSoftwareInterruptHandler, which calls KiSystemService. We now reach the first kernel-mode system call! (ZwClose from PspInitPhase0). - Reformat fastinterlck.c and change the way it's included per-architecture. svn path=/trunk/; revision=32666
2008-03-12 18:17:55 +00:00
* FILE: ntoskrnl/include/internal/arm/ksarm.h
* PURPOSE: Definitions and offsets for ARM Assembly and C code
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#ifdef _ASM_
Fix comments in ksarm.h -- they must be C89. svn path=/trunk/; revision=32324
2008-02-12 16:32:13 +00:00
/*
* CPSR Values
*/
Move the entrypoint and startup code in boot.s. Write ksarm.h and kxarm.h headers, defining the ARM Assembly ABI. Rewrite the ARM assembler files we currently have to match the ABI. svn path=/trunk/; revision=32313
2008-02-12 05:55:12 +00:00
.equ CPSR_THUMB_ENABLE, 0x20
- Fix incorrect definition of PCR and USERPCR which was making us incorrect memory. - Fix incorrect definition of ARM_CONTROL_REGISTER, which was stopping us from correctly enabling High Vectors. - The RtlCaptureStackLimits and RtlWakeChainFrame routines in libsupp.c cannot possibly be portable across all architectures -- separated ARM versions in an arm directory. - Setup the panic stack for abort/undefined exceptions, and the interrupt stack for FIQs. - Implement support for exceptions! We can now display the address which caused a data abort, and begin handling exceptions. - Implement all the HAL Spinlock/IRQL functions except KfRaise/LowerIrql which actually do the work. - We're booting all the way to setting up the user_shared_data memory area. svn path=/trunk/; revision=32653
2008-03-11 02:45:13 +00:00
.equ CPSR_FIQ_DISABLE, 0x40
.equ CPSR_IRQ_DISABLE, 0x80
- We now define a much simpler system call interface -- instead of using interrupt 2E with the system call ID in the ip register, we use the system call ID as the interrupt number! On ARM, all software interrupts have a generic handler, so ANY software interrupt will be a system call, and the interrupt number is the system call ID! - Removed a bunch more i386-only exports from the ARM kernel. - Implemented all the READ/WRITE_REGISTER* routines for ARM/PPC. - Implement half of KiSoftwareInterruptException, which calls KiSoftwareInterruptHandler, which calls KiSystemService. We now reach the first kernel-mode system call! (ZwClose from PspInitPhase0). - Reformat fastinterlck.c and change the way it's included per-architecture. svn path=/trunk/; revision=32666
2008-03-12 18:17:55 +00:00
.equ CPSR_USER_MODE, 0x10
- Fix incorrect definition of PCR and USERPCR which was making us incorrect memory. - Fix incorrect definition of ARM_CONTROL_REGISTER, which was stopping us from correctly enabling High Vectors. - The RtlCaptureStackLimits and RtlWakeChainFrame routines in libsupp.c cannot possibly be portable across all architectures -- separated ARM versions in an arm directory. - Setup the panic stack for abort/undefined exceptions, and the interrupt stack for FIQs. - Implement support for exceptions! We can now display the address which caused a data abort, and begin handling exceptions. - Implement all the HAL Spinlock/IRQL functions except KfRaise/LowerIrql which actually do the work. - We're booting all the way to setting up the user_shared_data memory area. svn path=/trunk/; revision=32653
2008-03-11 02:45:13 +00:00
.equ CPSR_FIQ_MODE, 0x11
.equ CPSR_IRQ_MODE, 0x12
.equ CPSR_SVC_MODE, 0x13
.equ CPSR_ABORT_MODE, 0x17
.equ CPSR_UND_MODE, 0x1B
- Convert all Loader Block structures to virtual addresses (By adding KSEG0_BASE) since the kernel eventually unmaps the page table responsible for the physical->virtual identity mapping, but we'll still need to access the loader block. - Implement proper trap prolog/epilog code -- currently used and tested in the data abort handler. Currently hacked away some KTRAP_FRAME stuff on ARM. - The data abort handler has a very rudimentary check to detect page faults and will call MmAccessFaults, this means we now support paged pool! - We now succesfully go past MmInitSystem and go all the way until ObInitSystem (still in Phase 0). svn path=/trunk/; revision=32659
2008-03-11 16:13:43 +00:00
.equ CPSR_MODES, 0x1F
- Fix incorrect definition of PCR and USERPCR which was making us incorrect memory. - Fix incorrect definition of ARM_CONTROL_REGISTER, which was stopping us from correctly enabling High Vectors. - The RtlCaptureStackLimits and RtlWakeChainFrame routines in libsupp.c cannot possibly be portable across all architectures -- separated ARM versions in an arm directory. - Setup the panic stack for abort/undefined exceptions, and the interrupt stack for FIQs. - Implement support for exceptions! We can now display the address which caused a data abort, and begin handling exceptions. - Implement all the HAL Spinlock/IRQL functions except KfRaise/LowerIrql which actually do the work. - We're booting all the way to setting up the user_shared_data memory area. svn path=/trunk/; revision=32653
2008-03-11 02:45:13 +00:00
Move the entrypoint and startup code in boot.s. Write ksarm.h and kxarm.h headers, defining the ARM Assembly ABI. Rewrite the ARM assembler files we currently have to match the ABI. svn path=/trunk/; revision=32313
2008-02-12 05:55:12 +00:00
Fix comments in ksarm.h -- they must be C89. svn path=/trunk/; revision=32324
2008-02-12 16:32:13 +00:00
/*
* C1 Register Values
*/
Move the entrypoint and startup code in boot.s. Write ksarm.h and kxarm.h headers, defining the ARM Assembly ABI. Rewrite the ARM assembler files we currently have to match the ABI. svn path=/trunk/; revision=32313
2008-02-12 05:55:12 +00:00
.equ C1_MMU_CONTROL, 0x01
.equ C1_ALIGNMENT_CONTROL, 0x02
.equ C1_DCACHE_CONTROL, 0x04
.equ C1_ICACHE_CONTROL, 0x1000
.equ C1_VECTOR_CONTROL, 0x2000
Write initialization code in assembly -- we load the kernel stack from FreeLDR and jump to C code. We now have a file for C-code initialization (no reason to use assembly). We now have some basic TLB routines and intrinsics (not tested). We also detect if we are running on V4 or V6, and set the TLB and ASID counts respectively. svn path=/trunk/; revision=32323
2008-02-12 16:22:01 +00:00
Fix comments in ksarm.h -- they must be C89. svn path=/trunk/; revision=32324
2008-02-12 16:32:13 +00:00
/*
* Loader Parameter Block Offsets
*/
Write initialization code in assembly -- we load the kernel stack from FreeLDR and jump to C code. We now have a file for C-code initialization (no reason to use assembly). We now have some basic TLB routines and intrinsics (not tested). We also detect if we are running on V4 or V6, and set the TLB and ASID counts respectively. svn path=/trunk/; revision=32323
2008-02-12 16:22:01 +00:00
.equ LpbKernelStack, 0x18
- Fix incorrect definition of PCR and USERPCR which was making us incorrect memory. - Fix incorrect definition of ARM_CONTROL_REGISTER, which was stopping us from correctly enabling High Vectors. - The RtlCaptureStackLimits and RtlWakeChainFrame routines in libsupp.c cannot possibly be portable across all architectures -- separated ARM versions in an arm directory. - Setup the panic stack for abort/undefined exceptions, and the interrupt stack for FIQs. - Implement support for exceptions! We can now display the address which caused a data abort, and begin handling exceptions. - Implement all the HAL Spinlock/IRQL functions except KfRaise/LowerIrql which actually do the work. - We're booting all the way to setting up the user_shared_data memory area. svn path=/trunk/; revision=32653
2008-03-11 02:45:13 +00:00
.equ LpbPanicStack, 0x74
.equ LpbInterruptStack, 0x5C
/*
* Trap Frame offsets
*/
- Rewrite the low-level trap/exception/system call code from the ground up: - Do not corrupt the stack anymore - Use a consistent trap frame layout (enable OldIrql and PreviousMode, and set the 0xBADB0D00 debug mark) - Use slower but more correct trap prolog/epilog code for now. - Generalize all prolog/epilog code into macros just like on x86. As a result, traps are now 6 lines of code. - Rewrite the system call interface from the ground up: - System calls didn't actually work: a debug print made the stack layout magical enough so that they didn't normally crush, but only slowly ate the stack. - Copying arguments from caller to system call was, as the comment on the original code so aptly put it, "total shit". - Due to ABI concerns, and to provide an actual template on how you're -supposed- to implement something like system calls on RISC processors, we now use a model similar to BSD, but about ten times better (with that much less code too). We'll document it later on the RosPSG Wiki. - This code probably contains some of the most vile-yet-elegant macro magic ever written for such low-level code as system call dispatching. - The result of all this is that we're at the same place as before (RamdiskAddDevice needs to be implemented by the Ramdisk guys) but with a sane low-level backend that isn't slowly eating away the stack, corrupting data, and basically working through random chance. - Move timebase code from stubs.c to its own file, time.c. - Silence multiple debug prints and fix a corrupted debug print in KiSystemStartup. svn path=/trunk/; revision=34366
2008-07-08 09:11:44 +00:00
.equ TrDbgArgMark, 0x00
.equ TrR0, 0x04
.equ TrR1, 0x08
.equ TrR2, 0x0C
.equ TrR3, 0x10
.equ TrR4, 0x14
.equ TrR5, 0x18
.equ TrR6, 0x1C
.equ TrR7, 0x20
.equ TrR8, 0x24
.equ TrR9, 0x28
.equ TrR10, 0x2C
.equ TrR11, 0x30
.equ TrR12, 0x34
.equ TrUserSp, 0x38
.equ TrUserLr, 0x3C
.equ TrSvcSp, 0x40
.equ TrSvcLr, 0x44
.equ TrPc, 0x48
.equ TrSpsr, 0x4C
- Improve system call handler by adding more debugging checks to be used later. - Optimize and simplify trap handling by using a common exit just like on x86's Kei386EoiHelper - KiExceptionExit. This way the code isn't duplicated 6 times. - Do the same for system calls (KiServiceExit). - Save the previous trap frame and restore it during each system call. svn path=/trunk/; revision=34640
2008-07-21 15:55:58 +00:00
.equ TrapFrameLength, (23 * 0x04)
Write initialization code in assembly -- we load the kernel stack from FreeLDR and jump to C code. We now have a file for C-code initialization (no reason to use assembly). We now have some basic TLB routines and intrinsics (not tested). We also detect if we are running on V4 or V6, and set the TLB and ASID counts respectively. svn path=/trunk/; revision=32323
2008-02-12 16:22:01 +00:00
- Clean up KTRAP_FRAME and KEXCEPTION_FRAME definition. - Add assembly offsets for KEXCEPTION_FRAME to ksarm.h. svn path=/trunk/; revision=34488
2008-07-14 03:15:48 +00:00
/*
* Exception Frame offsets
*/
.equ ExR4, 0x00
.equ ExR5, 0x04
.equ ExR6, 0x08
.equ ExR7, 0x0C
.equ ExR8, 0x10
.equ ExR9, 0x14
.equ ExR10, 0x18
.equ ExR11, 0x1C
.equ ExLr, 0x20
.equ ExSpsr, 0x24
.equ ExceptionFrameLength, (10 * 0x04)
Fix comments in ksarm.h -- they must be C89. svn path=/trunk/; revision=32324
2008-02-12 16:32:13 +00:00
/*
* PCR
*/
Write initialization code in assembly -- we load the kernel stack from FreeLDR and jump to C code. We now have a file for C-code initialization (no reason to use assembly). We now have some basic TLB routines and intrinsics (not tested). We also detect if we are running on V4 or V6, and set the TLB and ASID counts respectively. svn path=/trunk/; revision=32323
2008-02-12 16:22:01 +00:00
.equ KiPcr, 0xFFFFF000
- We now define a much simpler system call interface -- instead of using interrupt 2E with the system call ID in the ip register, we use the system call ID as the interrupt number! On ARM, all software interrupts have a generic handler, so ANY software interrupt will be a system call, and the interrupt number is the system call ID! - Removed a bunch more i386-only exports from the ARM kernel. - Implemented all the READ/WRITE_REGISTER* routines for ARM/PPC. - Implement half of KiSoftwareInterruptException, which calls KiSoftwareInterruptHandler, which calls KiSystemService. We now reach the first kernel-mode system call! (ZwClose from PspInitPhase0). - Reformat fastinterlck.c and change the way it's included per-architecture. svn path=/trunk/; revision=32666
2008-03-12 18:17:55 +00:00
- We now make appropriate space on the stack to save the old IRQL in the trap frame. - Save the old IRQL and assert it in the interrupt handler. - Fix KTRAP_FRAME structure. svn path=/trunk/; revision=33934
2008-06-11 18:39:44 +00:00
/*
* PCR Offsets
*/
.equ PcCurrentIrql, 0x14C
- We now implement a skeleton framework for context switching - The only things we do are swap the stack and then display the old/new thread/stack. - More work to be done to actually save the non-volatiles, prepare the thread state, and restore the volatiles for the new thread. - Then we will return to the saved return address, and we should be in Phase 1 with working thread switching/scheduling. svn path=/trunk/; revision=33935
2008-06-11 19:13:25 +00:00
/*
* KTHREAD Offsets
*/
.equ ThKernelStack, 0x20
- Implement VidResetDisplay in BootVid-arm. - Implement KiSaveProcessorControlState and make the appropriate changes to KPROCESSOR_STATE and KSPECIAL_REGISTERS on ARM to support this, as well as moving the ARM Register definitions from ntos to NDK. - Implement RtlCaptureContext. - With these changes, BSODs now work, but because of missing palette code, they are actually R(Red)SODs, which is awesome. - Remove debug prints from system call code -- this ends up somehow corrupting the return values *sigh*. More work to be done there, defintely. We have now regressed but we have an RSOD. svn path=/trunk/; revision=34120
2008-06-27 03:06:11 +00:00
/*
* CONTEXT Offsets
*/
.equ CONTEXT_FULL, 0x43
.equ CsContextFlags, 0x00
.equ CsR0, 0x04
.equ CsR1, 0x08
.equ CsR2, 0x0C
.equ CsR3, 0x10
.equ CsR4, 0x14
.equ CsR5, 0x18
.equ CsR6, 0x1C
.equ CsR7, 0x20
.equ CsR8, 0x24
.equ CsR9, 0x28
.equ CsR10, 0x2C
.equ CsR11, 0x30
.equ CsR12, 0x34
.equ CsSp, 0x38
.equ CsLr, 0x3C
.equ CsPc, 0x40
.equ CsPsr, 0x44
- Write a DebugService routine for ARM in the RTL library and get rid of the hack in ntoskrnl. - Just like on x86, this routine generates a breakpoint -- on ARM this is done with BKPT followed by an index. - We use the BREAKPOINT_PRINT index just like on x86. - This generates a prefetch abort -- so now we implement the prefetch abort handler. Thanks to the trap macros, this was 10 lines of code. - This calls into the real C handler, which is now unimplemented and hangs the whole system, so we've regressed way back (on purpose). svn path=/trunk/; revision=34474
2008-07-13 22:40:36 +00:00
/*
* DebugService Control Types
*/
.equ BREAKPOINT_BREAK, 0
.equ BREAKPOINT_PRINT, 1
.equ BREAKPOINT_PROMPT, 2
.equ BREAKPOINT_LOAD_SYMBOLS, 3
.equ BREAKPOINT_UNLOAD_SYMBOLS, 4
.equ BREAKPOINT_COMMAND_STRING, 5
- We now define a much simpler system call interface -- instead of using interrupt 2E with the system call ID in the ip register, we use the system call ID as the interrupt number! On ARM, all software interrupts have a generic handler, so ANY software interrupt will be a system call, and the interrupt number is the system call ID! - Removed a bunch more i386-only exports from the ARM kernel. - Implemented all the READ/WRITE_REGISTER* routines for ARM/PPC. - Implement half of KiSoftwareInterruptException, which calls KiSoftwareInterruptHandler, which calls KiSystemService. We now reach the first kernel-mode system call! (ZwClose from PspInitPhase0). - Reformat fastinterlck.c and change the way it's included per-architecture. svn path=/trunk/; revision=32666
2008-03-12 18:17:55 +00:00
#else
/*
* CPSR Values
*/
#define CPSR_THUMB_ENABLE 0x20
#define CPSR_FIQ_DISABLE 0x40
#define CPSR_IRQ_DISABLE 0x80
#define CPSR_USER_MODE 0x10
#define CPSR_FIQ_MODE 0x11
#define CPSR_IRQ_MODE 0x12
#define CPSR_SVC_MODE 0x13
#define CPSR_ABORT_MODE 0x17
#define CPSR_UND_MODE 0x1B
#define CPSR_MODES 0x1F
#endif
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