2010-01-09 19:28:29 +00:00
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/*
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* PROJECT: ReactOS Universal Serial Bus Bulk Enhanced Host Controller Interface
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* LICENSE: GPL - See COPYING in the top level directory
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* FILE: drivers/usb/usbehci/urbreq.c
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* PURPOSE: URB Related Functions.
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* PROGRAMMERS:
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2010-09-15 13:16:59 +00:00
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* Michael Martin (michael.martin@reactos.org)
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2010-01-09 19:28:29 +00:00
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*/
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#include "usbehci.h"
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/* QueueHead must point to the base address in common buffer */
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PVOID
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IntializeHeadQueueForStandardRequest(PQUEUE_HEAD QueueHead,
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PQUEUE_TRANSFER_DESCRIPTOR *CtrlTD1,
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PQUEUE_TRANSFER_DESCRIPTOR *CtrlTD2,
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PQUEUE_TRANSFER_DESCRIPTOR *CtrlTD3,
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2010-04-14 14:46:10 +00:00
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PUSB_DEFAULT_PIPE_SETUP_PACKET *CtrlSetup,
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2010-01-09 19:28:29 +00:00
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PVOID *CtrlData,
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ULONG Size)
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{
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QueueHead->HorizontalLinkPointer = (ULONG)QueueHead | QH_TYPE_QH;
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/* Set NakCountReload to max value possible */
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QueueHead->EndPointCapabilities1.NakCountReload = 0xF;
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/* 1 for non high speed, 0 for high speed device */
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QueueHead->EndPointCapabilities1.ControlEndPointFlag = 0;
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QueueHead->EndPointCapabilities1.HeadOfReclamation = TRUE;
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QueueHead->EndPointCapabilities1.MaximumPacketLength = 64;
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/* Get the Initial Data Toggle from the QEDT */
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QueueHead->EndPointCapabilities1.QEDTDataToggleControl = TRUE;
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/* HIGH SPEED DEVICE */
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QueueHead->EndPointCapabilities1.EndPointSpeed = QH_ENDPOINT_HIGHSPEED;
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QueueHead->EndPointCapabilities1.EndPointNumber = 0;
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/* Only used for Periodic Schedule and Not High Speed devices.
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Setting it to one result in undefined behavior for Async */
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QueueHead->EndPointCapabilities1.InactiveOnNextTransaction = 0;
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QueueHead->EndPointCapabilities1.DeviceAddress = 0;
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QueueHead->EndPointCapabilities2.HubAddr = 0;
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QueueHead->EndPointCapabilities2.NumberOfTransactionPerFrame = 0x01;
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/* 0 For Async, 1 for periodoc schedule */
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QueueHead->EndPointCapabilities2.InterruptScheduleMask = 0;
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QueueHead->EndPointCapabilities2.PortNumber = 0;
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QueueHead->EndPointCapabilities2.SplitCompletionMask = 0;
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QueueHead->CurrentLinkPointer = 0;
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QueueHead->QETDPointer = TERMINATE_POINTER;
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QueueHead->AlternateNextPointer = TERMINATE_POINTER;
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QueueHead->Token.Bits.InterruptOnComplete = TRUE;
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QueueHead->BufferPointer[0] = 0;
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QueueHead->BufferPointer[1] = 0;
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QueueHead->BufferPointer[2] = 0;
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QueueHead->BufferPointer[3] = 0;
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QueueHead->BufferPointer[4] = 0;
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/* Queue Head Initialized */
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/* Queue Transfer Descriptors must be 32 byte aligned and reside in continous physical memory */
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*CtrlTD1 = (PQUEUE_TRANSFER_DESCRIPTOR) (((ULONG)(QueueHead) + sizeof(QUEUE_HEAD) + 0x1F) & ~0x1F);
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*CtrlTD2 = (PQUEUE_TRANSFER_DESCRIPTOR) (((ULONG)(*CtrlTD1) + sizeof(QUEUE_TRANSFER_DESCRIPTOR) + 0x1F) & ~0x1F);
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*CtrlTD3 = (PQUEUE_TRANSFER_DESCRIPTOR) (((ULONG)(*CtrlTD2) + sizeof(QUEUE_TRANSFER_DESCRIPTOR) + 0x1F) & ~0x1F);
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/* Must be Page aligned */
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2010-04-14 14:46:10 +00:00
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*CtrlSetup = (PUSB_DEFAULT_PIPE_SETUP_PACKET) (( (ULONG)(*CtrlTD3) + sizeof(QUEUE_TRANSFER_DESCRIPTOR) + 0xFFF) & ~0xFFF);
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*CtrlData = (PVOID) (( (ULONG)(*CtrlSetup) + sizeof(USB_DEFAULT_PIPE_SETUP_PACKET) + 0xFFF) & ~0xFFF);
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2010-01-09 19:28:29 +00:00
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(*CtrlTD1)->NextPointer = TERMINATE_POINTER;
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(*CtrlTD1)->AlternateNextPointer = TERMINATE_POINTER;
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(*CtrlTD1)->BufferPointer[0] = (ULONG)MmGetPhysicalAddress((PVOID) (*CtrlSetup)).LowPart;
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(*CtrlTD1)->Token.Bits.DataToggle = FALSE;
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(*CtrlTD1)->Token.Bits.InterruptOnComplete = FALSE;
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2010-04-14 14:46:10 +00:00
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(*CtrlTD1)->Token.Bits.TotalBytesToTransfer = sizeof(USB_DEFAULT_PIPE_SETUP_PACKET);
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2010-01-09 19:28:29 +00:00
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(*CtrlTD1)->Token.Bits.ErrorCounter = 0x03;
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(*CtrlTD1)->Token.Bits.PIDCode = PID_CODE_SETUP_TOKEN;
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(*CtrlTD1)->Token.Bits.Active = TRUE;
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(*CtrlTD2)->NextPointer = TERMINATE_POINTER;
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(*CtrlTD2)->AlternateNextPointer = TERMINATE_POINTER;
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2010-07-06 12:02:33 +00:00
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if (Size == 0)
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(*CtrlTD2)->BufferPointer[0] = 0;
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else
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(*CtrlTD2)->BufferPointer[0] = (ULONG)MmGetPhysicalAddress((PVOID) (*CtrlData)).LowPart;
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2010-01-09 19:28:29 +00:00
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(*CtrlTD2)->Token.Bits.DataToggle = TRUE;
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(*CtrlTD2)->Token.Bits.InterruptOnComplete = TRUE;
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(*CtrlTD2)->Token.Bits.TotalBytesToTransfer = Size;
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(*CtrlTD2)->Token.Bits.ErrorCounter = 0x03;
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(*CtrlTD2)->Token.Bits.PIDCode = PID_CODE_IN_TOKEN;
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(*CtrlTD2)->Token.Bits.Active = TRUE;
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(*CtrlTD1)->NextPointer = (ULONG)MmGetPhysicalAddress((PVOID)(*CtrlTD2)).LowPart;
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(*CtrlTD3)->NextPointer = TERMINATE_POINTER;
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(*CtrlTD3)->AlternateNextPointer = TERMINATE_POINTER;
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(*CtrlTD3)->BufferPointer[0] = 0;
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(*CtrlTD3)->Token.Bits.Active = TRUE;
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(*CtrlTD3)->Token.Bits.PIDCode = PID_CODE_OUT_TOKEN;
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(*CtrlTD3)->Token.Bits.InterruptOnComplete = TRUE;
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2010-07-06 12:02:33 +00:00
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(*CtrlTD3)->Token.Bits.TotalBytesToTransfer = 0;
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2010-01-09 19:28:29 +00:00
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(*CtrlTD3)->Token.Bits.DataToggle = TRUE;
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(*CtrlTD3)->Token.Bits.ErrorCounter = 0x03;
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(*CtrlTD2)->NextPointer = (ULONG) MmGetPhysicalAddress((PVOID)(*CtrlTD3)).LowPart;
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return NULL;
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}
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BOOLEAN
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2010-04-14 14:46:10 +00:00
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ExecuteControlRequest(PFDO_DEVICE_EXTENSION DeviceExtension, PUSB_DEFAULT_PIPE_SETUP_PACKET SetupPacket, UCHAR Address, ULONG Port, PVOID Buffer, ULONG BufferLength)
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2010-01-09 19:28:29 +00:00
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{
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2010-04-14 14:46:10 +00:00
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PUSB_DEFAULT_PIPE_SETUP_PACKET CtrlSetup = NULL;
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PVOID CtrlData = NULL;
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2010-01-09 19:28:29 +00:00
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PQUEUE_TRANSFER_DESCRIPTOR CtrlTD1 = NULL;
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PQUEUE_TRANSFER_DESCRIPTOR CtrlTD2 = NULL;
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PQUEUE_TRANSFER_DESCRIPTOR CtrlTD3 = NULL;
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2010-04-14 14:46:10 +00:00
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2010-01-09 19:28:29 +00:00
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PQUEUE_HEAD QueueHead;
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PEHCI_USBCMD_CONTENT UsbCmd;
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PEHCI_USBSTS_CONTEXT UsbSts;
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LONG Base;
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LONG tmp;
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2010-04-14 14:46:10 +00:00
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DPRINT1("ExecuteControlRequest: Buffer %x, Length %x\n", Buffer, BufferLength);
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2010-09-05 18:43:17 +00:00
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ExAcquireFastMutex(&DeviceExtension->AsyncListMutex);
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2010-01-09 19:28:29 +00:00
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Base = (ULONG) DeviceExtension->ResourceMemory;
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/* Set up the QUEUE HEAD in memory */
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QueueHead = (PQUEUE_HEAD) ((ULONG)DeviceExtension->AsyncListQueueHeadPtr);
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2010-04-14 14:46:10 +00:00
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/* Initialize the memory pointers */
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2010-01-09 19:28:29 +00:00
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IntializeHeadQueueForStandardRequest(QueueHead,
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&CtrlTD1,
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&CtrlTD2,
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&CtrlTD3,
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&CtrlSetup,
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(PVOID)&CtrlData,
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2010-04-14 14:46:10 +00:00
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BufferLength);
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2010-01-09 19:28:29 +00:00
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2010-07-03 11:40:58 +00:00
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QueueHead->EndPointCapabilities2.PortNumber = Port;
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QueueHead->EndPointCapabilities1.DeviceAddress = Address;
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2010-04-14 14:46:10 +00:00
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CtrlSetup->bmRequestType._BM.Recipient = SetupPacket->bmRequestType._BM.Recipient;
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CtrlSetup->bmRequestType._BM.Type = SetupPacket->bmRequestType._BM.Type;
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CtrlSetup->bmRequestType._BM.Dir = SetupPacket->bmRequestType._BM.Dir;
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CtrlSetup->bRequest = SetupPacket->bRequest;
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CtrlSetup->wValue.LowByte = SetupPacket->wValue.LowByte;
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CtrlSetup->wValue.HiByte = SetupPacket->wValue.HiByte;
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CtrlSetup->wIndex.W = SetupPacket->wIndex.W;
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CtrlSetup->wLength = SetupPacket->wLength;
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2010-01-09 19:28:29 +00:00
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tmp = READ_REGISTER_ULONG((PULONG) (Base + EHCI_USBCMD));
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UsbCmd = (PEHCI_USBCMD_CONTENT) &tmp;
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UsbCmd->Run = FALSE;
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WRITE_REGISTER_ULONG((PULONG) (Base + EHCI_USBCMD), tmp);
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/* Wait for the controller to halt */
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for (;;)
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{
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KeStallExecutionProcessor(10);
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tmp = READ_REGISTER_ULONG((PULONG)(Base + EHCI_USBSTS));
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UsbSts = (PEHCI_USBSTS_CONTEXT)&tmp;
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DPRINT("Waiting for Halt, USBSTS: %x\n", READ_REGISTER_ULONG ((PULONG)(Base + EHCI_USBSTS)));
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if (UsbSts->HCHalted)
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{
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break;
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}
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}
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/* Set to TRUE on interrupt for async completion */
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DeviceExtension->AsyncComplete = FALSE;
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QueueHead->QETDPointer = (ULONG) MmGetPhysicalAddress((PVOID)(CtrlTD1)).LowPart;
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tmp = READ_REGISTER_ULONG((PULONG) (Base + EHCI_USBCMD));
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UsbCmd = (PEHCI_USBCMD_CONTENT) &tmp;
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UsbCmd->AsyncEnable = TRUE;
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WRITE_REGISTER_ULONG((PULONG)(Base + EHCI_USBCMD), tmp);
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tmp = READ_REGISTER_ULONG((PULONG) (Base + EHCI_USBCMD));
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UsbCmd = (PEHCI_USBCMD_CONTENT) &tmp;
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/* Interrupt on Async completion */
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UsbCmd->DoorBell = TRUE;
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UsbCmd->Run = TRUE;
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WRITE_REGISTER_ULONG((PULONG)(Base + EHCI_USBCMD), tmp);
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for (;;)
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{
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2010-07-06 12:02:33 +00:00
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KeStallExecutionProcessor(100);
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2010-01-09 19:28:29 +00:00
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DPRINT("Waiting for completion!\n");
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if (DeviceExtension->AsyncComplete == TRUE)
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break;
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}
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2010-07-06 12:02:33 +00:00
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UsbCmd->Run = FALSE;
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WRITE_REGISTER_ULONG((PULONG)(Base + EHCI_USBCMD), tmp);
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2010-09-14 09:46:28 +00:00
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if (SetupPacket->bmRequestType._BM.Dir == BMREQUEST_DEVICE_TO_HOST)
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2010-01-09 19:28:29 +00:00
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{
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2010-04-14 14:46:10 +00:00
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if ((Buffer) && (BufferLength))
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2010-01-09 19:28:29 +00:00
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{
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2010-04-14 14:46:10 +00:00
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RtlCopyMemory(Buffer, CtrlData, BufferLength);
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2010-01-09 19:28:29 +00:00
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}
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2010-04-14 14:46:10 +00:00
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else
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DPRINT1("Unable to copy data to buffer\n");
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2010-01-09 19:28:29 +00:00
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}
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2010-09-05 18:43:17 +00:00
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ExReleaseFastMutex(&DeviceExtension->AsyncListMutex);
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2010-01-09 19:28:29 +00:00
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return TRUE;
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}
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