mirror of
https://github.com/reactos/reactos.git
synced 2024-07-11 15:15:27 +00:00
673 lines
15 KiB
C
673 lines
15 KiB
C
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/*
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* PROJECT: ReactOS nVidia nForce Ethernet Controller Driver
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* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
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* PURPOSE: Common header file
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* COPYRIGHT: Copyright 2021-2022 Dmitry Borisov <di.sean@protonmail.com>
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*/
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#ifndef _NVNET_PCH_
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#define _NVNET_PCH_
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#if !DBG
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#define NO_KERNEL_LIST_ENTRY_CHECKS
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#endif
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#include <ndis.h>
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#include <section_attribs.h>
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#include "eth.h"
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#include "nic.h"
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#include "phyreg.h"
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#define NVNET_TAG 'ENVN'
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#if defined(SARCH_XBOX)
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/* Reduce memory requirements on OG Xbox */
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#define NVNET_TRANSMIT_BLOCKS 8
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#define NVNET_TRANSMIT_DESCRIPTORS 32
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#define NVNET_TRANSMIT_BUFFERS 1
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#define NVNET_RECEIVE_DESCRIPTORS 16
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#else
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#define NVNET_TRANSMIT_BLOCKS 64
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#define NVNET_TRANSMIT_DESCRIPTORS 512
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#define NVNET_TRANSMIT_BUFFERS 16
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#define NVNET_RECEIVE_DESCRIPTORS 512
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#endif
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#define NVNET_ALIGNMENT 64
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#define NVNET_RECEIVE_BUFFER_SIZE 2048
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#define NVNET_RECEIVE_PROCESSING_LIMIT 64
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#define NVNET_IM_THRESHOLD 4
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#define NVNET_IM_MAX_IDLE 40
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#if defined(SARCH_XBOX)
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#define NVNET_TRANSMIT_HANG_THRESHOLD 3
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#else
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#define NVNET_TRANSMIT_HANG_THRESHOLD 5
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#endif
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#if defined(SARCH_XBOX)
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#define NVNET_FRAGMENTATION_THRESHOLD 8
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#else
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#define NVNET_FRAGMENTATION_THRESHOLD 32
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#endif
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#define NVNET_MEDIA_DETECTION_INTERVAL 5000
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#define NVNET_MAXIMUM_FRAME_SIZE 1514
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#define NVNET_MAXIMUM_FRAME_SIZE_JUMBO 9014
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#define NVNET_MAXIMUM_VLAN_ID 0xFFF
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#define NVNET_MULTICAST_LIST_SIZE 32
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#define NVNET_MINIMUM_LSO_SEGMENT_COUNT 2
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#define NVNET_MAXIMUM_LSO_FRAME_SIZE 0xFC00
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#define NVNET_PACKET_FILTERS ( \
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NDIS_PACKET_TYPE_DIRECTED | \
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NDIS_PACKET_TYPE_MULTICAST | \
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NDIS_PACKET_TYPE_BROADCAST | \
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NDIS_PACKET_TYPE_PROMISCUOUS | \
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NDIS_PACKET_TYPE_ALL_MULTICAST)
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#define PACKET_ENTRY(Packet) ((PLIST_ENTRY)(&(Packet)->MiniportReserved[0]))
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typedef enum _NVNET_OPTIMIZATION_MODE
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{
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NV_OPTIMIZATION_MODE_DYNAMIC = 0,
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NV_OPTIMIZATION_MODE_CPU,
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NV_OPTIMIZATION_MODE_THROUGHPUT
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} NVNET_OPTIMIZATION_MODE;
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typedef enum _NVNET_FLOW_CONTROL_MODE
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{
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NV_FLOW_CONTROL_DISABLE = 0,
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NV_FLOW_CONTROL_AUTO,
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NV_FLOW_CONTROL_RX,
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NV_FLOW_CONTROL_TX,
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NV_FLOW_CONTROL_RX_TX
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} NVNET_FLOW_CONTROL_MODE;
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typedef union _NVNET_OFFLOAD
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{
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struct {
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ULONG SendIpOptions:1;
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ULONG SendTcpOptions:1;
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ULONG SendTcpChecksum:1;
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ULONG SendUdpChecksum:1;
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ULONG SendIpChecksum:1;
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ULONG ReceiveIpOptions:1;
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ULONG ReceiveTcpOptions:1;
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ULONG ReceiveTcpChecksum:1;
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ULONG ReceiveUdpChecksum:1;
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ULONG ReceiveIpChecksum:1;
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ULONG SendIpV6Options:1;
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ULONG SendTcpV6Options:1;
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ULONG SendTcpV6Checksum:1;
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ULONG SendUdpV6Checksum:1;
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ULONG ReceiveIpV6Options:1;
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ULONG ReceiveTcpV6Options:1;
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ULONG ReceiveTcpV6Checksum:1;
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ULONG ReceiveUdpV6Checksum:1;
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};
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ULONG Value;
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} NVNET_OFFLOAD, *PNVNET_OFFLOAD;
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typedef struct _NVNET_STATISTICS
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{
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ULONG64 HwTxCnt;
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ULONG64 HwTxZeroReXmt;
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ULONG64 HwTxOneReXmt;
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ULONG64 HwTxManyReXmt;
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ULONG64 HwTxLateCol;
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ULONG64 HwTxUnderflow;
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ULONG64 HwTxLossCarrier;
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ULONG64 HwTxExcessDef;
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ULONG64 HwTxRetryErr;
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ULONG64 HwRxFrameErr;
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ULONG64 HwRxExtraByte;
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ULONG64 HwRxLateCol;
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ULONG64 HwRxRunt;
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ULONG64 HwRxFrameTooLong;
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ULONG64 HwRxOverflow;
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ULONG64 HwRxFCSErr;
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ULONG64 HwRxFrameAlignErr;
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ULONG64 HwRxLenErr;
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ULONG64 HwTxDef;
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ULONG64 HwTxFrame;
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ULONG64 HwRxCnt;
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ULONG64 HwTxPause;
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ULONG64 HwRxPause;
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ULONG64 HwRxDropFrame;
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ULONG64 HwRxUnicast;
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ULONG64 HwRxMulticast;
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ULONG64 HwRxBroadcast;
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ULONG64 HwTxUnicast;
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ULONG64 HwTxMulticast;
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ULONG64 HwTxBroadcast;
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ULONG64 TransmitOk;
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ULONG64 ReceiveOk;
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ULONG64 TransmitErrors;
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ULONG64 ReceiveErrors;
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ULONG64 ReceiveNoBuffers;
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ULONG64 ReceiveCrcErrors;
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ULONG64 ReceiveAlignmentErrors;
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ULONG64 TransmitDeferred;
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ULONG64 TransmitExcessiveCollisions;
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ULONG64 ReceiveOverrunErrors;
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ULONG64 TransmitUnderrunErrors;
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ULONG64 TransmitZeroRetry;
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ULONG64 TransmitOneRetry;
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ULONG64 TransmitLostCarrierSense;
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ULONG64 TransmitLateCollisions;
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ULONG ReceiveIrqNoBuffers;
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} NVNET_STATISTICS, *PNVNET_STATISTICS;
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typedef struct _NVNET_WAKE_FRAME
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{
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union
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{
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UCHAR AsUCHAR[16];
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ULONG AsULONG[4];
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} PatternMask;
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UCHAR WakeUpPattern[128];
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} NVNET_WAKE_FRAME, *PNVNET_WAKE_FRAME;
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typedef struct _NVNET_TX_BUFFER_DATA
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{
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PVOID VirtualAddress;
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NDIS_PHYSICAL_ADDRESS PhysicalAddress;
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} NVNET_TX_BUFFER_DATA, *PNVNET_TX_BUFFER_DATA;
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typedef struct _NVNET_TX_BUFFER
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{
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SINGLE_LIST_ENTRY Link;
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PVOID VirtualAddress;
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NDIS_PHYSICAL_ADDRESS PhysicalAddress;
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} NVNET_TX_BUFFER, *PNVNET_TX_BUFFER;
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typedef union _NVNET_TBD
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{
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PNVNET_DESCRIPTOR_32 x32;
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PNVNET_DESCRIPTOR_64 x64;
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PVOID Memory;
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} NVNET_TBD;
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typedef struct _NVNET_TCB
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{
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NVNET_TBD Tbd;
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NVNET_TBD DeferredTbd;
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PNDIS_PACKET Packet;
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PNVNET_TX_BUFFER Buffer;
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ULONG Slots;
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ULONG Flags;
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#define NV_TCB_LARGE_SEND 0x00000001
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#define NV_TCB_CHECKSUM_IP 0x00000002
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#define NV_TCB_CHECKSUM_TCP 0x00000004
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#define NV_TCB_CHECKSUM_UDP 0x00000008
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#define NV_TCB_COALESCE 0x00000010
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ULONG Mss;
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} NVNET_TCB, *PNVNET_TCB;
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typedef union _NV_RBD
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{
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PNVNET_DESCRIPTOR_32 x32;
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PNVNET_DESCRIPTOR_64 x64;
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PVOID Memory;
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} NV_RBD;
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typedef struct _NVNET_RBD
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{
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NV_RBD NvRbd;
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PNDIS_PACKET Packet;
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PNDIS_BUFFER Buffer;
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} NVNET_RBD, *PNVNET_RBD;
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typedef struct _NVNET_SEND
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{
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NDIS_SPIN_LOCK Lock;
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PNVNET_TCB HeadTcb;
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PNVNET_TCB TailTcb;
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PNVNET_TCB LastTcb;
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PNVNET_TCB CurrentTcb;
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PNVNET_TCB DeferredTcb;
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NVNET_TBD HeadTbd;
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NVNET_TBD TailTbd;
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NVNET_TBD CurrentTbd;
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ULONG TcbSlots;
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ULONG TbdSlots;
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ULONG StuckCount;
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ULONG PacketsCount;
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SINGLE_LIST_ENTRY BufferList;
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} NVNET_SEND, *PNVNET_SEND;
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typedef struct _NVNET_RECEIVE
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{
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NDIS_SPIN_LOCK Lock;
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NV_RBD NvRbd;
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} NVNET_RECEIVE, *PNVNET_RECEIVE;
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typedef struct _NVNET_ADAPTER NVNET_ADAPTER, *PNVNET_ADAPTER;
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typedef VOID
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(NVNET_TRANSMIT_PACKET)(
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_In_ PNVNET_ADAPTER Adapter,
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_In_ PNVNET_TCB Tcb,
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_In_ PSCATTER_GATHER_LIST SgList);
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typedef NVNET_TRANSMIT_PACKET *PNVNET_TRANSMIT_PACKET;
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typedef ULONG
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(NVNET_PROCESS_TRANSMIT)(
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_In_ PNVNET_ADAPTER Adapter,
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_Inout_ PLIST_ENTRY SendReadyList);
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typedef NVNET_PROCESS_TRANSMIT *PNVNET_PROCESS_TRANSMIT;
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typedef ULONG
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(NVNET_PROCESS_RECEIVE)(
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_In_ PNVNET_ADAPTER Adapter,
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_In_ ULONG TotalRxProcessed);
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typedef NVNET_PROCESS_RECEIVE *PNVNET_PROCESS_RECEIVE;
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typedef struct _NVNET_ADAPTER
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{
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volatile PUCHAR IoBase;
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NDIS_HANDLE AdapterHandle;
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ULONG Features;
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ULONG Flags;
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#define NV_ACTIVE 0x80000000
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#define NV_SEND_CHECKSUM 0x00000002
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#define NV_SEND_LARGE_SEND 0x00000004
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#define NV_SEND_ERRATA_PRESENT 0x00000008
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#define NV_MAC_IN_USE 0x00000010
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#define NV_GIGABIT_PHY 0x00000020
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#define NV_UNIT_SEMAPHORE_ACQUIRED 0x00000040
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#define NV_USE_SOFT_MAC_ADDRESS 0x00000100
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#define NV_FORCE_SPEED_AND_DUPLEX 0x00000200
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#define NV_FORCE_FULL_DUPLEX 0x00000400
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#define NV_USER_SPEED_100 0x00000800
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#define NV_PACKET_PRIORITY 0x00001000
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#define NV_VLAN_TAGGING 0x00002000
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ULONG TxRxControl;
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ULONG InterruptMask;
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ULONG InterruptStatus;
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ULONG InterruptIdleCount;
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ULONG AdapterStatus;
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NVNET_OPTIMIZATION_MODE OptimizationMode;
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NVNET_OFFLOAD Offload;
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ULONG IpHeaderOffset;
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ULONG PacketFilter;
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NVNET_SEND Send;
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NVNET_RECEIVE Receive;
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PUCHAR ReceiveBuffer;
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ULONG CurrentRx;
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PNVNET_TRANSMIT_PACKET TransmitPacket;
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PNVNET_PROCESS_TRANSMIT ProcessTransmit;
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NVNET_STATISTICS Statistics;
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NDIS_SPIN_LOCK Lock;
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ULONG MaximumFrameSize;
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ULONG ReceiveBufferSize;
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ULONG VlanId;
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ULONG WakeFlags;
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ULONG PhyAddress;
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ULONG PhyModel;
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ULONG PhyRevision;
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ULONG PhyOui;
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ULONG PowerStatePending;
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ULONG VlanControl;
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ULONG PauseFlags;
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ULONG LinkSpeed;
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BOOLEAN Connected;
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BOOLEAN FullDuplex;
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ULONG OriginalMacAddress[2];
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UCHAR PermanentMacAddress[ETH_LENGTH_OF_ADDRESS];
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UCHAR CurrentMacAddress[ETH_LENGTH_OF_ADDRESS];
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_Field_range_(0, NVNET_MULTICAST_LIST_SIZE)
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ULONG MulticastListSize;
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struct
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{
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UCHAR MacAddress[ETH_LENGTH_OF_ADDRESS];
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} MulticastList[NVNET_MULTICAST_LIST_SIZE];
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ULONG WakeFrameBitmap;
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PNVNET_WAKE_FRAME WakeFrames[NV_WAKEUPPATTERNS_V2];
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NDIS_HANDLE WrapperConfigurationHandle;
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NDIS_WORK_ITEM PowerWorkItem;
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NDIS_WORK_ITEM ResetWorkItem;
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_Interlocked_
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volatile LONG ResetLock;
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NDIS_PHYSICAL_ADDRESS IoAddress;
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ULONG IoLength;
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NVNET_FLOW_CONTROL_MODE FlowControlMode;
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NDIS_MINIPORT_TIMER MediaDetectionTimer;
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USHORT DeviceId;
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UCHAR RevisionId;
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BOOLEAN InterruptShared;
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NDIS_MINIPORT_INTERRUPT Interrupt;
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ULONG InterruptVector;
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ULONG InterruptLevel;
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ULONG InterruptFlags;
|
||
|
|
|
||
|
|
NDIS_PHYSICAL_ADDRESS TbdPhys;
|
||
|
|
NDIS_PHYSICAL_ADDRESS RbdPhys;
|
||
|
|
NDIS_PHYSICAL_ADDRESS ReceiveBufferPhys;
|
||
|
|
|
||
|
|
PVOID SendBuffer;
|
||
|
|
PVOID TbdOriginal;
|
||
|
|
PVOID RbdOriginal;
|
||
|
|
PVOID AdapterOriginal;
|
||
|
|
NDIS_PHYSICAL_ADDRESS TbdPhysOriginal;
|
||
|
|
NDIS_PHYSICAL_ADDRESS RbdPhysOriginal;
|
||
|
|
NVNET_TX_BUFFER_DATA SendBufferAllocationData[NVNET_TRANSMIT_BUFFERS];
|
||
|
|
} NVNET_ADAPTER, *PNVNET_ADAPTER;
|
||
|
|
|
||
|
|
#define NvNetLogError(Adapter, ErrorCode) \
|
||
|
|
NdisWriteErrorLogEntry((Adapter)->AdapterHandle, ErrorCode, 1, __LINE__)
|
||
|
|
|
||
|
|
NVNET_TRANSMIT_PACKET NvNetTransmitPacket32;
|
||
|
|
NVNET_TRANSMIT_PACKET NvNetTransmitPacket64;
|
||
|
|
NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptorsLegacy;
|
||
|
|
NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors32;
|
||
|
|
NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors64;
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
NDIS_STATUS
|
||
|
|
NTAPI
|
||
|
|
MiniportInitialize(
|
||
|
|
_Out_ PNDIS_STATUS OpenErrorStatus,
|
||
|
|
_Out_ PUINT SelectedMediumIndex,
|
||
|
|
_In_ PNDIS_MEDIUM MediumArray,
|
||
|
|
_In_ UINT MediumArraySize,
|
||
|
|
_In_ NDIS_HANDLE MiniportAdapterHandle,
|
||
|
|
_In_ NDIS_HANDLE WrapperConfigurationContext);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
VOID
|
||
|
|
NvNetFreeAdapter(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
NDIS_STATUS
|
||
|
|
NvNetRecognizeHardware(
|
||
|
|
_Inout_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
NDIS_STATUS
|
||
|
|
NvNetGetPermanentMacAddress(
|
||
|
|
_Inout_ PNVNET_ADAPTER Adapter,
|
||
|
|
_Out_writes_bytes_all_(ETH_LENGTH_OF_ADDRESS) PUCHAR MacAddress);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
VOID
|
||
|
|
NvNetSetupMacAddress(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_reads_bytes_(ETH_LENGTH_OF_ADDRESS) PUCHAR MacAddress);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
NDIS_STATUS
|
||
|
|
NvNetInitNIC(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ BOOLEAN InitPhy);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
NDIS_STATUS
|
||
|
|
NvNetFindPhyDevice(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
NDIS_STATUS
|
||
|
|
NvNetPhyInit(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
SidebandUnitReleaseSemaphore(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
VOID
|
||
|
|
NvNetStartAdapter(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
DECLSPEC_NOINLINE
|
||
|
|
VOID
|
||
|
|
NvNetPauseProcessing(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
VOID
|
||
|
|
NvNetStopAdapter(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
VOID
|
||
|
|
NvNetFlushTransmitQueue(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ NDIS_STATUS CompleteStatus);
|
||
|
|
|
||
|
|
KSYNCHRONIZE_ROUTINE NvNetInitPhaseSynchronized;
|
||
|
|
NDIS_TIMER_FUNCTION NvNetMediaDetectionDpc;
|
||
|
|
|
||
|
|
BOOLEAN
|
||
|
|
MiiWrite(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ ULONG PhyAddress,
|
||
|
|
_In_ ULONG RegAddress,
|
||
|
|
_In_ ULONG Data);
|
||
|
|
|
||
|
|
BOOLEAN
|
||
|
|
MiiRead(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ ULONG PhyAddress,
|
||
|
|
_In_ ULONG RegAddress,
|
||
|
|
_Out_ PULONG Data);
|
||
|
|
|
||
|
|
BOOLEAN
|
||
|
|
NvNetUpdateLinkSpeed(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetResetReceiverAndTransmitter(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetStartReceiver(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetStartTransmitter(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetStopReceiver(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetStopTransmitter(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
VOID
|
||
|
|
NvNetIdleTransmitter(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ BOOLEAN ClearPhyControl);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetUpdatePauseFrame(
|
||
|
|
_Inout_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ ULONG PauseFlags);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetToggleClockPowerGating(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ BOOLEAN Gate);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetSetPowerState(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ NDIS_DEVICE_POWER_STATE NewPowerState,
|
||
|
|
_In_ ULONG WakeFlags);
|
||
|
|
|
||
|
|
CODE_SEG("PAGE")
|
||
|
|
VOID
|
||
|
|
NvNetBackoffSetSlotTime(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetBackoffReseed(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NvNetBackoffReseedEx(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter);
|
||
|
|
|
||
|
|
NDIS_STATUS
|
||
|
|
NTAPI
|
||
|
|
MiniportSend(
|
||
|
|
_In_ NDIS_HANDLE MiniportAdapterContext,
|
||
|
|
_In_ PNDIS_PACKET Packet,
|
||
|
|
_In_ UINT Flags);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NTAPI
|
||
|
|
MiniportISR(
|
||
|
|
_Out_ PBOOLEAN InterruptRecognized,
|
||
|
|
_Out_ PBOOLEAN QueueMiniportHandleInterrupt,
|
||
|
|
_In_ NDIS_HANDLE MiniportAdapterContext);
|
||
|
|
|
||
|
|
VOID
|
||
|
|
NTAPI
|
||
|
|
MiniportHandleInterrupt(
|
||
|
|
_In_ NDIS_HANDLE MiniportAdapterContext);
|
||
|
|
|
||
|
|
NDIS_STATUS
|
||
|
|
NTAPI
|
||
|
|
MiniportQueryInformation(
|
||
|
|
_In_ NDIS_HANDLE MiniportAdapterContext,
|
||
|
|
_In_ NDIS_OID Oid,
|
||
|
|
_In_ PVOID InformationBuffer,
|
||
|
|
_In_ ULONG InformationBufferLength,
|
||
|
|
_Out_ PULONG BytesWritten,
|
||
|
|
_Out_ PULONG BytesNeeded);
|
||
|
|
|
||
|
|
NDIS_STATUS
|
||
|
|
NTAPI
|
||
|
|
MiniportSetInformation(
|
||
|
|
_In_ NDIS_HANDLE MiniportAdapterContext,
|
||
|
|
_In_ NDIS_OID Oid,
|
||
|
|
_In_ PVOID InformationBuffer,
|
||
|
|
_In_ ULONG InformationBufferLength,
|
||
|
|
_Out_ PULONG BytesRead,
|
||
|
|
_Out_ PULONG BytesNeeded);
|
||
|
|
|
||
|
|
#define NV_IMPLICIT_ENTRIES(Length) \
|
||
|
|
(((Length - (NV_MAXIMUM_SG_SIZE + 1)) >> NV_TX2_TSO_MAX_SHIFT) + 1)
|
||
|
|
|
||
|
|
FORCEINLINE
|
||
|
|
VOID
|
||
|
|
NV_RELEASE_TCB(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ PNVNET_TCB Tcb)
|
||
|
|
{
|
||
|
|
if (Tcb->Flags & NV_TCB_COALESCE)
|
||
|
|
{
|
||
|
|
PushEntryList(&Adapter->Send.BufferList, &Tcb->Buffer->Link);
|
||
|
|
}
|
||
|
|
|
||
|
|
Tcb->Packet = NULL;
|
||
|
|
|
||
|
|
++Adapter->Send.TcbSlots;
|
||
|
|
|
||
|
|
Adapter->Send.TbdSlots += Tcb->Slots;
|
||
|
|
|
||
|
|
Adapter->Send.StuckCount = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
FORCEINLINE
|
||
|
|
PNVNET_TCB
|
||
|
|
NV_NEXT_TCB(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ PNVNET_TCB Tcb)
|
||
|
|
{
|
||
|
|
if (Tcb++ == Adapter->Send.TailTcb)
|
||
|
|
return Adapter->Send.HeadTcb;
|
||
|
|
else
|
||
|
|
return Tcb;
|
||
|
|
}
|
||
|
|
|
||
|
|
FORCEINLINE
|
||
|
|
NVNET_TBD
|
||
|
|
NV_NEXT_TBD_32(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ NVNET_TBD Tbd)
|
||
|
|
{
|
||
|
|
if (Tbd.x32++ == Adapter->Send.TailTbd.x32)
|
||
|
|
return Adapter->Send.HeadTbd;
|
||
|
|
else
|
||
|
|
return Tbd;
|
||
|
|
}
|
||
|
|
|
||
|
|
FORCEINLINE
|
||
|
|
NVNET_TBD
|
||
|
|
NV_NEXT_TBD_64(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ NVNET_TBD Tbd)
|
||
|
|
{
|
||
|
|
if (Tbd.x64++ == Adapter->Send.TailTbd.x64)
|
||
|
|
return Adapter->Send.HeadTbd;
|
||
|
|
else
|
||
|
|
return Tbd;
|
||
|
|
}
|
||
|
|
|
||
|
|
FORCEINLINE
|
||
|
|
VOID
|
||
|
|
NV_WRITE(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ NVNET_REGISTER Register,
|
||
|
|
_In_ ULONG Value)
|
||
|
|
{
|
||
|
|
NdisWriteRegisterUlong((PULONG)(Adapter->IoBase + Register), Value);
|
||
|
|
}
|
||
|
|
|
||
|
|
FORCEINLINE
|
||
|
|
ULONG
|
||
|
|
NV_READ(
|
||
|
|
_In_ PNVNET_ADAPTER Adapter,
|
||
|
|
_In_ NVNET_REGISTER Register)
|
||
|
|
{
|
||
|
|
ULONG Value;
|
||
|
|
|
||
|
|
NdisReadRegisterUlong((PULONG)(Adapter->IoBase + Register), &Value);
|
||
|
|
return Value;
|
||
|
|
}
|
||
|
|
|
||
|
|
#define NvNetDisableInterrupts(Adapter) \
|
||
|
|
NV_WRITE(Adapter, NvRegIrqMask, 0);
|
||
|
|
|
||
|
|
#define NvNetApplyInterruptMask(Adapter) \
|
||
|
|
NV_WRITE(Adapter, NvRegIrqMask, (Adapter)->InterruptMask);
|
||
|
|
|
||
|
|
#endif /* _NVNET_PCH_ */
|