2013-03-14 21:04:13 +00:00
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/*
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2020-07-25 13:31:02 +00:00
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* PROJECT: ReactOS Hardware Abstraction Layer
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* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
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* PURPOSE: Initialize the x86 HAL
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* COPYRIGHT: Copyright 1998 David Welch (welch@cwcom.net)
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2004-12-03 20:10:45 +00:00
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*/
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/* INCLUDES *****************************************************************/
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2005-06-18 14:28:55 +00:00
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#include <hal.h>
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2020-07-25 13:31:02 +00:00
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2005-06-19 22:53:49 +00:00
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#define NDEBUG
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#include <debug.h>
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2004-12-03 20:10:45 +00:00
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2011-09-10 18:58:01 +00:00
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/* FUNCTIONS ****************************************************************/
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2004-12-03 20:10:45 +00:00
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2011-09-07 18:25:43 +00:00
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VOID
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NTAPI
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HalpInitProcessor(
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IN ULONG ProcessorNumber,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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/* Set default IDR */
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2020-07-25 13:31:02 +00:00
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KeGetPcr()->IDR = 0xFFFFFFFF & ~(1 << PIC_CASCADE_IRQ);
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2011-09-07 18:25:43 +00:00
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}
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2004-12-03 20:10:45 +00:00
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VOID
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2006-11-27 19:26:31 +00:00
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HalpInitPhase0(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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2004-12-03 20:10:45 +00:00
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{
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}
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2006-08-25 00:46:41 +00:00
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VOID
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HalpInitPhase1(VOID)
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{
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2020-07-25 13:31:02 +00:00
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/* Enable timer interrupt handler */
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2011-09-02 14:45:19 +00:00
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HalpEnableInterruptHandler(IDT_DEVICE,
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0,
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2020-07-25 13:31:02 +00:00
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PRIMARY_VECTOR_BASE + PIC_TIMER_IRQ,
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2011-09-02 14:45:19 +00:00
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CLOCK2_LEVEL,
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HalpClockInterrupt,
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Latched);
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2020-07-25 13:31:02 +00:00
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/* Enable RTC interrupt handler */
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2011-09-02 14:45:19 +00:00
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HalpEnableInterruptHandler(IDT_DEVICE,
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0,
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2020-07-25 13:31:02 +00:00
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PRIMARY_VECTOR_BASE + PIC_RTC_IRQ,
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2011-09-02 14:45:19 +00:00
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PROFILE_LEVEL,
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HalpProfileInterrupt,
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Latched);
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/* Initialize DMA. NT does this in Phase 0 */
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HalpInitDma();
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2006-08-25 00:46:41 +00:00
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}
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2004-12-03 20:10:45 +00:00
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/* EOF */
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